參數(shù)資料
型號(hào): PCM1796DBR
元件分類: DAC
英文描述: 24BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
中文描述: 24位192千赫采樣高級(jí)分段音頻立體聲數(shù)模轉(zhuǎn)換器
文件頁(yè)數(shù): 28/57頁(yè)
文件大小: 512K
代理商: PCM1796DBR
SLES100 DECEMBER 2003
www.ti.com
28
DME: Digital De-Emphasis Control
This bit is available for read and write.
Default value: 0
DME = 0
DME = 1
De-emphasis disabled (default)
De-emphasis enabled
The DME bit is used to enable or disable the de-emphasis function for both channels.
MUTE: Soft Mute Control
This bit is available for read and write.
Default value: 0
MUTE = 0
MUTE = 1
Soft mute disabled (default)
Soft mute enabled
The MUTE bit is used to enable or disable the soft mute function for both channels.
Soft mute is operated as a 256-step attenuator. The speed for each step to –
dB (mute) is determined by the
attenuation rate selected in the ATS register.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 19
R/W
0
0
1
0
0
1
1
REV
ATS1
ATS0
OPE
RSV
DFMS
FLT
INZD
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
REV: Output Phase Reversal
This bit is available for read and write.
Default value: 0
REV = 0
REV = 1
Normal output (default)
Inverted output
The REV bit is used to invert the output phase for both channels.
ATS[1:0]: Attenuation Rate Select
These bits are available for read and write.
Default value: 00
ATS[1:0]
00
01
10
11
Attenuation Rate Selection
Every LRCK (default)
LRCK/2
LRCK/4
LRCK/8
The ATS[1:0] bits are used to select the rate at which the attenuator is decremented/incremented during level
transitions.
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