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參數(shù)資料
| 型號： | PCM1796DBR |
| 元件分類： | DAC |
| 英文描述： | 24BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
| 中文描述： | 24位192千赫采樣高級分段音頻立體聲數(shù)模轉(zhuǎn)換器 |
| 文件頁數(shù)： | 46/57頁 |
| 文件大小： | 512K |
| 代理商： | PCM1796DBR |
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SLES100 DECEMBER 2003
www.ti.com
46
TDMCA INTERFACE FORMAT
The PCM1796 supports the time-division-multiplexed command and audio (TDMCA) data format to simplify the host
control serial interface. The TDMCA format is designed not only for the McBSP of TI DSPs but also for any
programmable devices. The TDMCA format can transfer not only audio data but also command data, so that it can
be used together with any kind of device that supports the TDMCA format. The TDMCA frame consists of a command
field, extended command field, and some audio data fields. Those audio data are transported to IN devices (such
as a DAC) and/or from OUT devices (such as an ADC). The PCM1796 is an IN device. LRCK and BCK are used
with both IN and OUT devices so that the sample frequency of all devices in a system must be the same. The TDMCA
mode supports a maximum of 30 device IDs. The maximum number of audio channels depends on the BCK
frequency.
TDMCA Mode Determination
The PCM1796 recognizes the TDMCA mode automatically when it receives an LRCK signal with a pulse duration
of two BCK clocks. If the TDMCA mode operation is not needed, the duty cycle of LRCK must be 50%. Figure 53
shows the LRCK and BCK timing that determines the TDMCA mode. The PCM1796 enters the TDMCA mode after
two continuous TDMCA frames. Any TDMCA commands can be issued during the next TDMCA frame after the
TDMCA mode is entered.
Pre-TDMCA Frame
BCK
LRCK
2 BCKs
TDMCA Frame
Command
Accept
Figure 53. LRCK and BCK Timing for Determination of TDMCA Mode
TDMCA Terminals
TDMCA requires six signals, of which four signals are for command and audio data interface, and one pair for daisy
chaining. Those signals can be shared as in the following table. The DO signal has a 3-state output so that it can
be connected directly to other devices.
TERMINAL
NAME
TDMCA
NAME
PROPERTY
DESCRIPTION
LRCK
LRCK
input
TDMCA frame start signal. It must be the same as the sampling frequency.
BCK
BCK
input
TDMCA clock. Its frequency must be high enough to communicate a TDMCA frame within an LRCK
cycle.
DATA
DI
input
TDMCA command and audio data input signal
MDO
DO
output
TDMCA command data 3-state output signal
MC
DCI
input
TDMCA daisy-chain input signal
MS
DCO
output
TDMCA daisy-chain output signal
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| PCM1796DBRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24 bit 192kHz Stereo Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1798 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-BIT, 192-KHZ SAMPLING ADVANCED SEGMENT, AUDIO STEREO DIGITAL TO ANALOG CONVERTER |
| PCM1798DB | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC PCM1798 24-Bit 192kHz Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1798DB | 制造商:Texas Instruments 功能描述:D/A CONVERTER (D-A) IC |
| PCM1798DBG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC PCM1798 24-Bit 192kHz Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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