SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
DEC
HEX
B7
B6
B5
B4
B3
B2
B1
B0
70
46
ATMDDA
ATSPDA
DEMP1
DEMP0
AZRO2
AZRO1
AZRO0
ZREV
ATMDDA
DAC Attenuation mode
This bit controls the DAC attenuation mode. ATDA1[7:0] to ATDA8[7:0] are simply used for
ATMDDA = 0, and ATDA0[7:0] + ATDA1[7:0] to ATDA0[7:0] + ATDA8[7:0] in decibel number are
used for ATMDDA = 1.
Default value: 0.
ATMDDA
DAC Attenuation mode
0
Each channel with independent data (default)
All channels with preset (independent) data + master (common) data in decibel
1
number
ATSPDA
DAC Attenuation speed
This bit controls the DAC attenuation speed. N × 2048/fS for ATSPDA = 0 and N × 4096/fS for
ATSPDA = 1. N is automatically selected according to the DAC sampling mode, SRDA, N = 1 for
single rate, N = 2 for dual rate, and N = 4 for quad rate.
Default value: 0.
ATSPDA
DAC Attenuation speed
0
N × 2048/fS (default)
1
N × 4096/fS
DEMP[1:0]
DAC Digital de-emphasis function/sampling rate control
These bits are used to control the enable/disable and sampling frequency of the digital
de-emphasis function.
Default value: 00.
DEMP
DAC Digital de-emphasis function/sampling rate control
00
Disable (default)
01
48 kHz enable
10
44.1 kHz enable
11
32 kHz enable
AZRO[2:0]
DAC Zero flag function select
The AZRO[2:0] bits are used to select the function of the zero flag pin.
Default value: 000.
AZRO
DAC Zero flag function select
000
DAC1/2/3/4/5/6/7/8 (8 channel) zero input detect with AND logic (default)
001
DAC1/2/3/4/5/6/7/8 (8 channel) zero input detect with OR logic
010
DAC1/2/3/4/5/6 (6 channel) zero input detect with AND logic
011
DAC1/2/3/4/5/6 (6 channel) zero input detect with OR logic
100
DAC7/8 (2 channel) zero input detect with AND logic
101
DAC7/8 (2 channel) zero input detect with OR logic
11x
Reserved
44
Copyright 2008, Texas Instruments Incorporated