參數資料
型號: PCM4222PFBRG4
英文描述: High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter
中文描述: 高性能,雙通道,24位,216kHz的采樣多位Δ-Σ模擬到數字轉換器
文件頁數: 16/40頁
文件大小: 609K
代理商: PCM4222PFBRG4
www.ti.com
PRODUCT INFORMATION
Reference
Multi-Bit
Delta-Sigma
Multi-Bit
Delta-Sigma
Digital
Filters
Audio
Serial
Port
DSD
Engine
Reset
Logic
Control
and
Status
Master Clock
and Timing
VINL+
VCOML
REFGNDL
VREFL
S/M
FMT0
FMT1
OWL0
OWL1
SUB0 (WCK0)
SUB1 (MCK0)
PCMEN
FS0 (MOD3)
FS1 (MOD4)
OVFL
OVFR
MODEN
DSDEN (MOD6)
DSDCLK
DSDL
DSDR
DSDMODE
V
V
A
A
A
A
A
A
D
D
D
V
RST
LRCK
BCK
DATA
DF (MOD5)
HPFDR (MOD1)
HPFDL (MOD2)
VREFR
MCKI
REFGNDR
VCOMR
VINL
-
VINR+
VINR
-
PCM4222
SBAS399A–OCTOBER 2006–REVISED MARCH 2007
The PCM4222 is a two-channel, multi-bit delta-sigma (
Σ
) analog-to-digital (A/D) converter. The 6-bit outputs
from the delta-sigma modulators are routed to the digital decimation filter, where the output of the filter provides
linear PCM data. The linear PCM data are output at the audio serial port interface for connection to external
processing and logic circuitry. The multi-bit modulator outputs are also routed to a direct stream digital (DSD)
engine, which converts the multi-bit data to one-bit DSD data. The DSD data are output at a separate serial
interface, allowing both PCM and DSD data to be output simultaneously from the PCM4222. The multi-bit
modulator data may also be output directly, for use by external digital filtering and processing hardware. When
the modulator output mode is enabled, the PCM and DSD outputs are not available.
Figure 36
shows a simplified functional block diagram for the PCM4222, highlighting the interconnection
between the various functional blocks. The pin names noted in parentheses on the block diagram reflect the pin
configuration for the Multi-Bit Modulator (MBM) output mode.
Figure 36. Functional Block Diagram
16
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