參數(shù)資料
型號(hào)： PCM4222PFBRG4
英文描述： High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter
中文描述： 高性能，雙通道，24位，216kHz的采樣多位Δ-Σ模擬到數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 24/40頁
文件大?。?/td> 609K
代理商： PCM4222PFBRG4
www.ti.com
Normal Mode
LRCK
L
Sub-frame 0 Sub-frame 1
One Frame, 1/f
S
Sub-frame 2 Sub-frame 3
R
L
R
L
R
L
R
L
Sub-frame 0 Sub-frame 1
One Frame, 1/f
S
One Frame, 1/f
S
Sub-frame 0 Sub-frame 1
R
L
R
L
R
L
R
L
One Frame One Frame
1/f
S
1/f
S
1/f
S
1/f
S
One Frame One Frame
R
L
R
L
R
L
R
DATA
LRCK
DATA
LRCK
DATA
Double Speed Mode
Quad Speed Mode
DIGITAL DECIMATION FILTER
The PCM4222 digital decimation filter is a linear phase, multistage finite impulse response (FIR) design with two
user-selectable filter responses. The decimation filter provides the digital downsampling and low-pass anti-alias
filter functions for the PCM4222.
DIGITAL HIGH-PASS FILTER
The PCM4222 incorporates digital high-pass filters for both the left and right audio channels, with the purpose of
removing the
Σ
modulator dc offset from the audio output data.
Figure 34
and
Figure 35
detail the frequency
response for the digital high-pass filter. The f
–3dB
frequency is approximately f
S
/48000, where f
S
is the PCM
output sampling rate.
PCM4222
SBAS399A–OCTOBER 2006–REVISED MARCH 2007
Each L or R channel time slot is 32-bits long, with 24-bit data Left-Justified in the time slot. Audio data is MSB first.
Sub-frame assignments for each PCM4222 device are selected by the corresponding SUB0 and SUB1 pin settings.
Figure 45. TDM Data Formats: Master Mode
The Classic filter response is typical of traditional audio data converters, with
Figure 26
through
Figure 29
detailing the frequency response, and the related specifications given in the
Electrical Characteristics
table. The
group delay for the Classic filter is 39/f
, or 812.5
μ
s for f
= 48kHz and 406.25
μ
s for f
S
= 96kHz. The Classic
filter response is not available for the Quad Speed sampling mode.
The Low Group Delay response provides a lower latency option for the decimation filter, and is detailed in
Figure 30
through
Figure 33
, with the relevant specifications given in the
Electrical Characteristics
table. The
Low Group Delay filter response is available for all sampling modes. The group delay for this filter is 21/f
S
, or
437.5
μ
s for f
S
= 48kHz, 218.75
μ
s for f
S
= 96kHz, and 109.375
μ
s for f
S
= 192kHz.
The decimation filter response is selected using the DF input (pin 21), with the settings summarized in
Table 5
.
For Quad Speed sampling mode operation, the Low Group Delay filter is always selected, regardless of the DF
pin setting.
Table 5. Decimation Filter Response Selection
DF (pin 21)
LO
HI
DECIMATION FILTER RESPONSE
Classic response, with group delay = 39/f
S
Low Group Delay response, with group delay = 21/f
S
Two inputs, HPFDR (pin 17) and HPFDL (pin 18), allow the digital high-pass filter to be enabled or disabled
individually for the right and left channels, respectively.
Table 6
summarizes the operation of the high-pass filter
disable pins.
24
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