參數(shù)資料
型號: PEB3065
廠商: SIEMENS AG
元件分類: Codec
英文描述: Signal Processing Subscriber Line Interface Codec Filter SLICOF
中文描述: 信號處理用戶線路接口編解碼器SLICOF
文件頁數(shù): 13/102頁
文件大小: 563K
代理商: PEB3065
PEB 3065
PEF 3065
SLICOFI
Principles
Semiconductor Group
13
01.98
steps which are done by the DSP-machine. The up sampling interpolation steps are
again processed by fast hardware structures to reduce the DSP-workload. The
upsampled 1-bit data stream is then converted to an analog equivalent which is
smoothed by a POST-Filter (POFI). At the summing point the values of the
TTX-Generator and the DC-loop are added and then transferred to the output pin 26
(
V
2W
).
Loops
There are two different loops implemented: The Impedance Matching (IM) loop which is
divided in 3 separate loops to guarantee very high flexibility to various impedances, and
the Transhybrid Balancing (TH) loop.
3.2
SLICOFI
Signal Flow Graph: DC
Figure 3
DC Characteristic
The incoming information at pin IT (scaled transversal current (AC + DC) transferred to
a voltage via a resistor) is first lowpass filtered (0.3 Hz) for stability and noise reasons
and then fed into the DC-characteristic block. This consists of two branches which
represents different kinds of feeding behavior. In typical applications it acts as a
programmable constant current source (
R
in
> 30 k). If the desired value cannot be held
ITS10182
IT
V2W
Output
Input
User Programmable Block
Functional Block
Fixed Filter Block
PCM
PCM
+
A
D
D
A
LP
DCCHAR
+
RNG
CHOP
ITAC
DCX
AG
AG
DCR
AC
LOOP
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