參數(shù)資料
型號: PHD45N03LTA
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: N-channel enhancement mode field-effect transistor
中文描述: 40 A, 25 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252
封裝: PLASTIC, SC-63, DPAK-3
文件頁數(shù): 5/14頁
文件大?。?/td> 298K
代理商: PHD45N03LTA
Philips Semiconductors
PHP/PHB/PHD45N03LTA
N-channel enhancement mode field-effect transistor
Product data
Rev. 02 — 02 November 2001
5 of 14
9397 750 09023
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
8.
Characteristics
Table 5:
T
j
= 25
°
C unless otherwise specified
Symbol Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
Characteristics
Conditions
Min
Typ
Max
Unit
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25
°
C
T
j
=
55
°
C
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°
C
T
j
= 175
°
C
T
j
=
55
°
C
V
DS
= 25 V; V
GS
= 0 V
T
j
= 25
°
C
T
j
= 175
°
C
V
GS
=
±
5 V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°
C
T
j
= 175
°
C
V
GS
= 10 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°
C
V
GS
= 3.5 V; I
D
= 5.2 A;
Figure 7
and
8
T
j
= 25
°
C
25
22
-
-
-
-
V
V
V
GS(th)
gate-source threshold voltage
1
0.5
-
1.5
-
-
2
-
2.3
V
V
V
I
DSS
drain-source leakage current
-
-
-
0.05
-
10
10
500
100
μ
A
μ
A
nA
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
-
-
17.5
30
24
40.8
m
m
-
13
21
m
-
22
40
m
Dynamic characteristics
Q
g(tot)
total gate charge
Q
gs
gate-source charge
Q
gd
gate-drain (Miller) charge
C
iss
input capacitance
C
oss
output capacitance
C
rss
reverse transfer capacitance
t
d(on)
turn-on delay time
t
r
turn-on rise time
t
d(off)
turn-off delay time
t
f
turn-off fall time
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 25 A; V
GS
= 0 V;
Figure 12
I
D
= 40 A; V
DD
= 24 V; V
GS
= 5 V;
Figure 13
-
-
-
-
-
-
-
-
-
-
19
5
8
700
290
200
10
60
35
40
-
-
11
-
-
-
20
90
60
60
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
Figure 11
V
DD
= 15 V; I
D
= 15 A; V
GS
= 10 V;
R
G
= 6
; resistive load
-
0.95
1.2
V
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