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參數(shù)資料
| 型號(hào)： | PHN70308 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | N-channel enhancement mode TrenchMOS transistor array(N溝道增強(qiáng)型TrenchMOS晶體管陣列) |
| 中文描述： | 5000 mA, 25 V, 7 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MO-150AH |
| 封裝： | PLASTIC, SSOP-28 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大小： | 172K |
| 代理商： | PHN70308 |
Philips Semiconductors
Product specification
N-channel enhancement mode
TrenchMOS transistor array
PHN70308
SOURCE-DRAIN DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25C unless otherwise specified
SYMBOL
PARAMETER
I
F
Continuous forward diode
current
CONDITIONS
T
sp
= 50 C
MIN.
TYP.
MAX.
UNIT
spindle FET;
δ
= 33.3%
isolation FET
spindle FET
isolation FET
I
F
= 1.25 A; V
GS
= 0 V
-
-
-
-
-
-
-
-
5
5
20
20
A
A
A
A
I
FRM
Repetitive peak forward diode
current
Diode forward voltage
V
F
spindle FET
isolation FET
-
-
0.8
0.8
1
1
V
V
t
rr
Reverse recovery time
I
F
= 1.25 A; -dI
F
/dt = 100 A/
μ
s;
V
DS
= 25 V
spindle FET
isolation FET
-
-
20
25
-
-
ns
ns
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
sp
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
sp
); conditions: V
GS
≥
10 V
Fig.3. Normalised drain-source on-state resistance.
R
DS(ON)
/R
DS(ON)25 C
= f(T
j
)
Fig.4. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Normalised Power Derating, Ptot (%)
0
10
20
30
40
50
60
70
80
90
100
0
20
40
60
80
100
120
140
160
Solder Point temperature, Tsp (C)
Normalised On-state Resistance
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
Junction temperature, Tj (C)
Normalised Current Derating, ID (%)
0
20
40
60
80
100
120
0
20
40
60
80
100
120
140
160
Solder Point temperature, Tsp (C)
Threshold Voltage, VGS(TO) (V)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
2.75
3
-60
-40
-20
0
20
Junction Temperature, Tj (C)
40
60
80
100
120
140
160
180
typical
minimum
May 1999
4
Rev 1.000
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