參數(shù)資料
型號: PIC16F716-I/SS
廠商: Microchip Technology
文件頁數(shù): 81/136頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 20SSOP
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 67
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 4x8b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
配用: XLT20SS-1-ND - SOCKET TRANSITION 18DIP 20SSOP
I3-DB16F716-ND - BOARD DAUGHTER ICEPIC3
AC164307-ND - MODULE SKT FOR PM3 28SSOP
AC162054-ND - HEADER INTERFACE ICD2 16F716
2007 Microchip Technology Inc.
DS41206B-page 47
PIC16F716
8.0
ENHANCED CAPTURE/
COMPARE/PWM MODULE
The Enhanced Capture/Compare/PWM module is a
peripheral which allows the user to time and control
different events. In Capture mode, the peripheral
allows the timing of the duration of an event. The
Compare mode allows the user to trigger an external
event when a predetermined amount of time has
expired. The PWM mode can generate a Pulse-Width
Modulated signal of varying frequency and duty cycle.
Table 8-1 shows the timer resources required by the
ECCP module.
TABLE 8-1:
ECCP MODE – TIMER
RESOURCES REQUIRED
Note:
CCPR1 and CCP1 throughout this
document refer to CCPR1 or CCPR2 and
CCP1 or CCP2, respectively.
ECCP Mode
Timer Resource
Capture
Timer1
Compare
Timer1
PWM
Timer2
REGISTER 8-1:
CCP1CON: ENHANCED CCP1 CONTROL REGISTER
R/W-0
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
P1M<1:0>: PWM Output Configuration bits
If CCP1M<3:2> = 00, 01, 10:
xx
= P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
If CCP1M<3:2> = 11:
00
= Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
01
= Full-Bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
10
= Half-Bridge output; P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11
= Full-Bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
bit 5-4
DC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
bit 3-0
CCP1M<3:0>: ECCP Mode Select bits
0000
= Capture/Compare/PWM off (resets ECCP module)
0001
= Unused (reserved)
0010
= Compare mode, toggle output on match (CCP1IF bit is set)
0011
= Unused (reserved)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (CCP1IF bit is set)
1001
= Compare mode, clear output on match (CCP1IF bit is set)
1010
= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
unaffected)
1011
= Compare mode, Special Event Trigger (CCP1IF bit is set; CCP1 resets TMR1 or TMR2)
1100
= PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101
= PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110
= PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111
= PWM mode; P1A, P1C active-low; P1B, P1D active-low
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