參數資料
型號: PIC16F872T-E/SS
廠商: Microchip Technology
文件頁數: 7/167頁
文件大小: 0K
描述: IC MCU CMOS 20MHZ 2K FLSH 28SSOP
標準包裝: 2,100
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數: 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數據轉換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
104
8048C–AVR–02/12
ATtiny43U
Figure 14-3. Three-wire Mode, Timing Diagram
The three-wire mode timing is shown in Figure 14-3 At the top of the figure is a USCK cycle ref-
erence. One bit is shifted into the USI Data Register (USIDR) for each of these cycles. The
USCK timing is shown for both external clock modes. In external clock mode 0 (USICS0 = 0), DI
is sampled at positive edges, and DO is changed (USI Data Register is shifted by one) at nega-
tive edges. In external clock mode 1 (USICS0 = 1) the opposite edges with respect to mode 0
are used. In other words, data is sampled at negative and output is changed at positive edges.
The USI clock modes corresponds to the SPI data mode 0 and 1.
Referring to the timing diagram (Figure 14-3), a bus transfer involves the following steps:
1.
The slave and master devices set up their data outputs and, depending on the protocol
used, enable their output drivers (mark A and B). The output is set up by writing the
data to be transmitted to the USI Data Register. The output is enabled by setting the
corresponding bit in the Data Direction Register of Port A. Note that there is not a pre-
ferred order of points A and B in the figure, but both must be at least one half USCK
cycle before point C, where the data is sampled. This is in order to ensure that the data
setup requirement is satisfied. The 4-bit counter is reset to zero.
2.
The master software generates a clock pulse by toggling the USCK line twice (C and
D). The bit values on the data input (DI) pins are sampled by the USI on the first edge
(C), and the data output is changed on the opposite edge (D). The 4-bit counter will
count both edges.
3.
Step 2. is repeated eight times for a complete register (byte) transfer.
4.
After eight clock pulses (i.e., 16 clock edges) the counter will overflow and indicate that
the transfer has been completed. If USI Buffer Registers are not used the data bytes
that have been transferred must now be processed before a new transfer can be initi-
ated. The overflow interrupt will wake up the processor if it is set to Idle mode.
Depending on the protocol used the slave device can now set its output to high
impedance.
14.3.2
SPI Master Operation Example
The following code demonstrates how to use the USI module as a SPI Master:
SPITransfer:
out
USIDR,r16
ldi
r16,(1<<USIOIF)
out
USISR,r16
ldi
r17,(1<<USIWM0)|(1<<USICS1)|(1<<USICLK)|(1<<USITC)
<continues>
MSB
654321
LSB
1
2
3
4
5
6
7
8
654321
LSB
USCK
DO
DI
D
C
B
A
E
CYCLE ( Reference )
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相關代理商/技術參數
參數描述
PIC16F872T-I/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F872T-I/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F872T-I/SS033 制造商:Microchip Technology Inc 功能描述:
PIC16F873-04/SO 功能描述:8位微控制器 -MCU 7KB 192 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F873-04/SO 制造商:Microchip Technology Inc 功能描述:8BIT FLASH MCU SMD 16F873 SOIC28