參數(shù)資料
型號(hào): PIC18F2321T-I/SS
廠商: Microchip Technology
文件頁(yè)數(shù): 106/110頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 4KX16 28SSOP
標(biāo)準(zhǔn)包裝: 2,100
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 25
程序存儲(chǔ)器容量: 8KB(4K x 16)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
2009 Microchip Technology Inc.
DS39689F-page 95
PIC18F2221/2321/4221/4321 FAMILY
9.0
8 x 8 HARDWARE MULTIPLIER
9.1
Introduction
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows the PIC18 devices to be used in many applica-
tions previously reserved for digital signal processors.
A comparison of various hardware and software
multiply operations, along with the savings in memory
and execution time, is shown in Table 9-1.
9.2
Operation
Example 9-1 shows the instruction sequence for an 8 x 8
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiplication. To account for the sign bits of the
arguments, each argument’s Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
EXAMPLE 9-1:
8 x 8 UNSIGNED
MULTIPLY ROUTINE
EXAMPLE 9-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
TABLE 9-1:
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
MOVF
ARG1, W
;
MULWF
ARG2
; ARG1 * ARG2 ->
; PRODH:PRODL
MOVF
ARG1, W
MULWF
ARG2
; ARG1 * ARG2 ->
; PRODH:PRODL
BTFSC
ARG2, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG1
MOVF
ARG2, W
BTFSC
ARG1, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG2
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 40 MHz
@ 10 MHz
@ 4 MHz
8 x 8 unsigned
Without hardware multiply
13
69
6.9
μs27.6 μs69 μs
Hardware multiply
1
100 ns
400 ns
1
μs
8 x 8 signed
Without hardware multiply
33
91
9.1
μs36.4 μs91 μs
Hardware multiply
6
600 ns
2.4
μs6 μs
16 x 16 unsigned
Without hardware multiply
21
242
24.2
μs96.8 μs242 μs
Hardware multiply
28
2.8
μs
11.2
μs28 μs
16 x 16 signed
Without hardware multiply
52
254
25.4
μs
102.6
μs254 μs
Hardware multiply
35
40
4.0
μs16.0 μs40 μs
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