參數(shù)資料
型號： PIC18F2321T-I/SS
廠商： Microchip Technology
文件頁數(shù)： 86/110頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 4KX16 28SSOP
標準包裝： 2,100
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復位，HLVD，POR，PWM，WDT
輸入/輸出數(shù)： 25
程序存儲器容量： 8KB（4K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 4.2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SSOP（0.209"，5.30mm 寬）
包裝： 帶卷 (TR)
2009 Microchip Technology Inc.
DS39689F-page 77
PIC18F2221/2321/4221/4321 FAMILY
6.5.3
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET
ADDRESSING MODE
The use of Indexed Literal Offset Addressing mode
effectively changes how the first 96 locations of Access
RAM (00h to 5Fh) are mapped. Rather than containing
just the contents of the bottom half of Bank 0, this mode
maps the contents from Bank 0 and a user-defined
“window” that can be located anywhere in the data
memory space. The value of FSR2 establishes the
lower boundary of the addresses mapped into the
window, while the upper boundary is defined by FSR2
plus 95 (5Fh). Addresses in the Access RAM above
5Fh are mapped as previously described (see
Section 6.3.2 “Access Bank”). An example of Access
Bank remapping in this addressing mode is shown in
Remapping of the Access Bank applies only to opera-
tions using the Indexed Literal Offset Addressing
mode. Operations that use the BSR (Access RAM bit is
‘1’) will continue to use direct addressing as before.
6.6
PIC18 Instruction Execution and
the Extended Instruction Set
Enabling the extended instruction set adds eight
additional commands to the existing PIC18 instruction
set. These instructions are executed as described in
FIGURE 6-9:
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL OFFSET
ADDRESSING MODE
Data Memory
000h
100h
200h
F80h
F00h
FFFh
Bank 1
Bank 15
Bank 2
through
Bank 14
SFRs
05Fh
ADDWF f, d, a
FSR2H:FSR2L = 120h
Locations in the region
from the FSR2 Pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to the bottom of the
Access RAM (000h-05Fh).
Locations in Bank 0, from
060h to 07Fh, are mapped
as usual to the middle of
the Access Bank.
Special Function Regis-
ters at F80h through FFFh
are
mapped
to
80h
through FFh, as usual.
Bank 0 addresses below
5Fh can still be addressed
by using the BSR.
Access Bank
00h
80h
FFh
7Fh
Bank 0
SFRs
Bank 1 “Window”
Bank 0
Bank 0
Window
Example Situation:
07Fh
120h
17Fh
5Fh
Bank 1
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