參數(shù)資料
型號(hào)： PID9q-604e
廠商： IBM Microeletronics
英文描述： 32-Bit RISC Microprocessor(32位精簡(jiǎn)指令集微處理器)
中文描述： 32位RISC微處理器（32位精簡(jiǎn)指令集微處理器）
文件頁(yè)數(shù)： 7/29頁(yè)
文件大小： 543K
代理商： PID9Q-604E
9/17/99 Revision 1.4
PID9q-604e Hardware Datasheet
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
7
Table 3 provides the thermal characteristics for the 604e.
Table 4 provides the DC electrical characteristics for the 604e.
Table 3. Thermal Characteristics
Characteristic
Symbol
Value
Rating
CBGA package thermal resistance, junction-to-top of die
θ
JC
0.03
°C/W
Note:
Refer to Section 1.8, “System Design Information,” for more details about thermal management.
Table 4. DC Electrical Specifications
Vdd = AVdd = 1.9 ±100 mV dc, OVdd = 3.3
±
5% V dc, GND = 0 V dc, 0
≤
Tj
≤
105 °C
Characteristic
Symbol
Min
Max
Unit
Input high voltage (all inputs except SYSCLK)
V
IH
2.0
3.465
V
Input low voltage (all inputs except SYSCLK)
V
IL
0.0
0.8
V
SYSCLK input high voltage
CV
IH
2.4
3.465
V
SYSCLK input low voltage
CV
IL
0.0
0.4
V
Input leakage current, Vin = 3.3 V
1
Hi-Z (off-state) leakage current, Vin
=
3.3 V
1
Output high voltage, I
OH
= –2
mA
I
in
—
10
μA
I
TSI
—
10
μA
V
OH
2.4
—
V
Output low voltage, I
OL
= 2
mA
Capacitance, Vin = 0 V, f = 1 MHz
2
(excludes TS, ABB, DBB,
and ARTRY)
V
OL
—
0.4
V
C
in
—
10.0
pF
Capacitance, Vin = 0 V, f = 1 MHz
2
(for TS, ABB, DBB, and
ARTRY)
C
in
—
15.0
pF
Output impedance
Normal mode (DRV_MOD[0–1] = 01)
Strong mode (DRV_MOD[0–1] = 10)
Herculean mode (DRV_MOD[0–1] = 11)
Z
o
56
42
30
84
57
30
Notes
:
1. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and JTAG signals).
2. Capacitance values are guaranteed by design and characterization, and are not tested.
3. Output impedance is guaranteed by design and is not tested. Refer to IBIS simulation models for output
impedance values based on Vdd and OVdd tolerances used in system.
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