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參數(shù)資料
| 型號： | PLF8577C |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | LCD direct/duplex driver with I2C-bus interface |
| 中文描述： | 液晶直接/雙工司機(jī)帶I2C總線接口 |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 195K |
| 代理商： | PLF8577C |
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1998 Jul 30
7
Philips Semiconductors
Product specification
LCD direct/duplex driver with
I
2
C-bus interface
PCF8577C
6.5
Direct drive mode
The PCF8577C is set to the direct drive mode by loading
the MODE control bit with logic 0. In this mode only four
bytes are required to store the data for the 32 segment
drivers. Setting the BANK bit to logic 0 selects even bytes
(BANK A), setting the BANK bit to logic 1 selects odd bytes
(BANK B).
In the direct drive mode the SBV is auto-incremented by
two after the loading of each segment byte register. This
means that auto-incremented loading of BANK A or
BANK B is possible. Either bank may be completely or
partially loaded irrespective of which bank is being
displayed. Direct drive output waveforms are shown in
Fig.4.
6.6
Duplex mode
The PCF8577C is set to the duplex mode by loading the
MODE bit with logic 1. In this mode a second backplane
signal (BP2) is needed and pin A2/BP2 is used for this;
therefore A2 and its equivalent SBV bit V5 are undefined.
The SBV auto-increments by one between loaded bytes.
All of the segment bytes are required to store data for the
32 segment drivers and the BANK bit is ignored.
Duplex mode output waveforms are shown in Fig.5.
Fig.5 Duplex mode display output waveforms.
V
on(rms)
= 0.791 (V
DD
V
SS
); V
off(rms)
= 0.354 (V
DD
V
SS
).
V
(
)
off rms
)
V
2.236
=
MGA738
VDD
0.5 (DD
VSS
0.5 (DD
0
0.5 (DD
(DD
VDD
0.5 (DD
VSS
VDD
VSS
SS
DD
0.5 (DD
0
0.5 (DD
(DD
SS
DD
BP2 Sx
BP1 Sx
Segment x
(Sx)
BP1
BP2
1
fLCD
OFF / OFF
ON / OFF
OFF / ON
ON / ON
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