參數(shù)資料
型號: PLSI1032-80LT
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High-Density Programmable Logic
中文描述: EE PLD, 20 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 3/19頁
文件大?。?/td> 256K
代理商: PLSI1032-80LT
Specifications
ispLSI and pLSI 1032
3
1996 ISP Encyclopedia
Absolute Maximum Ratings
1
Supply Voltage V
cc
...................................-0.5 to +7.0V
Input Voltage Applied........................ -2.5 to V
CC
+1.0V
Off-State Output Voltage Applied ..... -2.5 to V
CC
+1.0V
Storage Temperature................................ -65 to 150
°
C
Case Temp. with Power Applied .............. -55 to 125
°
C
Max. Junction Temp. (T
J
) with Power Applied ... 150
°
C
1. Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
V
V
PARAMETER
SYMBOL
MIN.
MAX.
UNITS
5.25
5.5
5.5
0.8
V
cc + 1
Supply Voltage
V
CC
V
IL
V
IH
Table 2- 0005Aisp w/mil.eps
4.75
4.5
4.5
0
2.0
Commercial T
A
=
0
°
C to +70
°
C
T
A
= -40
°
C to +85
°
C
Military/883
T
C
= -55
°
C to +125
°
C
Input Low Voltage
Input High Voltage
V
Capacitance (T
A
=25
o
C, f=1.0 MHz)
SYMBOL
C
1
PARAMETER
MAXIMUM
1
UNITS
TEST CONDITIONS
Commercial/Industrial
Dedicated Input Capacitance
8
pf
V
CC
=5.0V, V
IN
=2.0V
Military
10
pf
V
CC
=5.0V, V
IN
=2.0V
V
CC
=5.0V, V
I/O
, V
Y
=2.0V
C
2
1
.
Guaranteed but not 100% tested.
I/O and Clock Capacitance
10
pf
Table 2- 0006
Data Retention Specifications
Table 2- 0008B
PARAMETER
pLSI Erase/Reprogram Cycles
100
Data Retention
ispLSI Erase/Reprogram Cycles
MINIMUM
20
10000
MAXIMUM
UNITS
Years
Cycles
Cycles
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