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參數(shù)資料
| 型號： | PLV16V8 |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic |
| 中文描述： | 低電壓，零功率20引腳電子工程的CMOS通用可編程陣列邏輯 |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 425K |
| 代理商： | PLV16V8 |
14
PALLV16V8Z-20 (Ind)
CAPACITANCE
1
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where
capacitance may be affected.
SWITCHING CHARACTERISTICS OVER INDUSTRIAL OPERATING RANGES
1
Notes:
1. See “Switching Test Circuit” for test conditions.
2. This parameter is tested in Standby Mode. When the device is not in Standby Mode, the t
PD
will typically be about 2 ns faster.
3. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where
frequency may be affected.
4. t
CF
is a calculated value and is not guaranteed. t
CF
can be found using the following equation:
t
CF
= 1/f
MAX
(internal feedback) - t
S
.
Parameter
Symbol
Parameter Description
Test Condition
Typ
Unit
C
IN
Input Capacitance
V
IN
= 2.0 V
V
CC
= 5.0 V T
A
= 25°C,
f = 1 MHz
5
pF
C
OUT
Output Capacitance
V
OUT
= 2.0 V
8
pF
Parameter
Symbol
Parameter Description
-20
Unit
Min
Max
t
PD
Input or Feedback to Combinatorial Output (Note 2)
20
ns
t
S
Setup Time fromInput or Feedback to Clock
15
ns
t
H
Hold Time
0
ns
t
CO
Clock to Output
10
ns
t
WL
Clock Wdth
LOW
8
ns
t
WH
HIGH
8
ns
f
MAX
MaximumFrequency
(Notes 3 and 4)
External Feedback
1/(t
S
+ t
CO
)
40
MHz
Internal Feedback (fCNT)
1/(t
S
+ t
CF
)
50
MHz
No Feedback
1/(t
S
+ t
H
)
66.7
MHz
t
PZX
OE to Output Enable
20
ns
t
PXZ
OE to Output Disable
20
ns
t
EA
Input to Output Enable Using Product TermControl
20
ns
t
ER
Input to Output Disable Using Product TermControl
20
ns
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