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參數(shù)資料
| 型號： | PLX9656 |
| 英文描述： | I/O Accelerator|PCI9656 Data Book Corrections |
| 中文描述： | I / O加速器| PCI9656數(shù)據(jù)手冊更正 |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 162K |
| 代理商： | PLX9656 |
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12/19/2002
- 1 -
9656-SIL-DC1-P0-.96
PCI 9656 Blue Book Revision 0.90b Corrections
This document details several corrections to the PCI 9656 Blue Book, revision 0.90b. Please
review these corrections before proceeding with your design.
1.
Toggling IDDQEN# At Power On Time
When using the PCI 9656AD, external logic is required on the IDDQEN# pin to
configure the PCI buffers for proper operation. This external logic is
not
required
when using the PCI 9656BA. The requirement for this logic is not included in the Blue
Book.
PCI 9656AD IDDQEN#
To put the PCI 9656AD into its IDDQ state, hold the IDDQEN# input signal (ball A10) in its
asserted state.
To configure the PCI 9656AD for normal operation, during initialization the IDDQEN# input signal
must transition from its asserted state to its de-asserted state prior to PCI RST# de-assertion.
This causes the silicon to configure its PCI I/O buffers for proper bus operation. After this
transition completes, hold IDDQEN# in its de-asserted state.
Note.
For CompactPCI Hot Swap applications, IDDQEN# must be held in its de-
asserted state during pre-charge. As a result, CompactPCI Hot Swap
applications require that IDDQEN# transition from its de-asserted state to its
asserted state after pre-charge completes, and then transition back to its de-
asserted state prior to Local PCI RST# de-assertion.
PCI 9656BA IDDQEN#
To put the PCI 9656BA into its IDDQ state, hold the IDDQEN# input signal (ball A10) in its
asserted state.
To configure the PCI 9656BA for normal operation, hold IDDQEN# in its de-asserted state.
Note.
For applications that use the PCI 9656BA’s PCI Power Management
D3cold PME Generation feature, de-assert IDDQEN# by tying it directly to the
2.5V power source for Vcore. The PCI 9656BA uses IDDQEN# to sense both
when Vcore is going away to prepare to enter the D3cold state and when Vcore
is coming back to prepare to leave the D3cold state. Do not tie IDDQEN# to the
2.5V power source for 2.5Vaux, and do not tie it to the 3.3V power source for
either Vring or Card_Vaux.
Even though the PCI 9656BA does not require any transitioning of its IDDQEN# input signal for
proper PCI bus operation, transitioning the PCI 9656BA’s IDDQEN# in accordance with the PCI
9656AD IDDQEN# requirements, above, will have no effect on PCI 9656BA operation. As a
result, the PCI 9656BA can be substituted for the PCI 9656AD in existing designs without
needing to remove the external IDDQEN# transitioning logic.
Sample Circuit Designs Supporting All Silicon Versions
The following circuit diagrams come directly from the schematics of two PLX hardware reference
design boards that have been validated empirically. The first is an example circuit for designs that
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