參數(shù)資料
型號: PM5945-UTP5
廠商: PMC-Sierra, Inc.
英文描述: ATM PHYSICAL INTERFACE APPLICATION BOARD FOR CAT-5 UTP
中文描述: ATM物理接口貓應(yīng)用板- 5雙絞線
文件頁數(shù): 32/84頁
文件大小: 1666K
代理商: PM5945-UTP5
S
TANDARD
P
RODUCT
PMC-Sierra, Inc.
PM5945 -UTP5
PMC-940202 ISSUE 2. APRIL 7, 1995
______________________________________________________________________________________________
APP_SAPI_UTP5
______________________________________________________________________________________________
28
Microprocessor Interface Write Access
Table 13: Microprocessor Interface Write Access Parameters
Symbol
Parameter
Min
Max
Units
tS
DW
Data to Valid Write Set-up Time
20
ns
tS
AW
Address to Valid Write Set-up Time
25
ns
tH
AW
tS
DW
Address to Valid Write Hold Time
20
ns
Data to Valid Write Set-up Time
20
ns
tH
DW
Data to Valid Write Hold Time
20
ns
tV
WR
Valid Write Pulse Width
40
ns
Fig . 6 Microprocessor Interface Write Timing
tH
DW
Valid Data
D[7:0]
A[8:0]
(CSB+WRB)
tV
WR
tS
AW
tH
AW
tS
DW
Valid Address
Notes on Microprocessor Interface Write Timing:
1
A valid write cycle is defined as a logical OR of the CSB and the WRB signals.
2. Microprocessor Interface timing applies to normal mode register accesses only.
3. When a set-up time is specified between an input and a clock, the set-up time is
the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of
the clock.
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