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DATA SHEET
PM7367 FREEDM-32P32
ISSUE 2
PMC-1991499
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
57
Field
Description
IOC
The Interrupt On Complete (IOC) bit is used by the
host to instruct the TMAC to interrupt the host when
the current TD's data buffer has been read. When
IOC is logic 1, the TMAC asserts the IOCI interrupt
when the data buffer has been read. Additionally, the
Free Queue FIFO will be flushed. If IOC is logic zero,
the TMAC will not generate an interrupt and the Free
Queue FIFO will operate normally.
Host Next TD Pointer
[13:0]
The Host Next TD Pointer[13:0] bits are used to store
TDRs which permits the host to support linked lists of
TDs. As described above, linked lists of TDs are
terminated by setting the CE bit to logic 1. Linked
lists of TDs are used by the host to pass multiple TD
packets or multiple packets associated with the same
channel and priority level to the TMAC.
Transmit Buffer Size
[15:0]
The Transmit Buffer Size[15:0] field is used to
indicate the size in bytes of the current TD's data
buffer. (N.B. The TMAC does not make use of this
field.)
Transmit Descriptor Table
The Transmit Descriptor Table, which resides in host memory, contains all of the
Transmit Descriptors referenced by the TMAC. To access a TD, the TMAC takes
a TDR from a TDRR queue or from the TCDR table and adds 16 times its value
(because each TD is 16 bytes in size) to the Transmit Descriptor Table Base
(TDTB) pointer to form the actual address of the TD in host memory. Each TD
must reside in the Transmit Descriptor Table. The Transmit Descriptor Table can
contain a maximum of 16384 TDs. The base of the Transmit Descriptor Table is
user programmable using the TMAC Tx Descriptor Table Base register. Thus, as
shown below, each TD can be located using a Transmit Descriptor Reference
(TDR) combined with the TMAC Tx Descriptor Table Base register.