參數(shù)資料
型號(hào): PMWD16UN
廠商: NXP SEMICONDUCTORS
元件分類: 小信號(hào)晶體管
英文描述: Dual N-channel uTrenchMOS ultra low level FET
中文描述: 6000 mA, 20 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MO-153
封裝: PLASTIC, TSSOP-8
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 94K
代理商: PMWD16UN
9397 750 14724
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 24 March 2005
5 of 12
Philips Semiconductors
PMWD16UN
Dual N-channel
μ
TrenchMOS ultra low level FET
6.
Characteristics
Table 5:
T
j
= 25
°
C unless otherwise specified.
Symbol
Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
Characteristics
Conditions
Min
Typ
Max
Unit
I
D
= 250
μ
A; V
GS
= 0 V
T
j
= 25
°
C
T
j
=
55
°
C
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
and
10
V
DS
= 20 V; V
GS
= 0 V
T
j
= 25
°
C
T
j
= 150
°
C
V
GS
=
±
10 V; V
DS
= 0 V
V
GS
= 4.5 V; I
D
= 3.5 A;
Figure 7
and
8
T
j
= 25
°
C
T
j
= 150
°
C
V
GS
= 1.8 V; I
D
= 3.5 A;
Figure 7
and
8
V
GS
= 2.5 V; I
D
= 3.5 A;
Figure 7
and
8
20
18
0.45
-
-
0.7
-
-
-
V
V
V
V
GS(th)
I
DSS
gate-source threshold voltage
drain-source leakage current
-
-
-
-
-
-
1
100
100
μ
A
μ
A
nA
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
-
-
-
-
16
27
22
18
19
32
30
22
m
m
m
m
Dynamic characteristics
Q
g(tot)
total gate charge
Q
gs
gate-source charge
Q
gd
gate-drain (Miller) charge
C
iss
input capacitance
C
oss
output capacitance
C
rss
reverse transfer capacitance
t
d(on)
turn-on delay time
t
r
rise time
t
d(off)
turn-off delay time
t
f
fall time
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 4 A; V
GS
= 0 V;
Figure 12
t
rr
reverse recovery time
Q
r
recovered charge
I
D
= 4 A; V
DS
= 16 V; V
GS
= 4.5 V;
Figure 13
-
-
-
-
-
-
-
-
-
-
23.6
2.1
6.7
1366
339
239
14
22
56
33
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
GS
= 0 V; V
DS
= 16 V; f = 1 MHz;
Figure 11
V
DS
= 10 V; R
L
= 10
; V
GS
= 4.5 V;
R
G
= 6
-
-
-
0.67
45
33
1.2
-
-
V
ns
nC
I
S
= 4 A; dI
S
/dt =
100 A/
μ
s; V
GS
= 0 V;
V
R
= 20 V
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