Part Number 440GRx
Revision 1.08 – October 15, 2007
AMCC Proprietary
1
440GRx
PowerPC 440GRx Embedded Processor
Preliminary Data Sheet
Features
PowerPC
440 processor operating up to
667MHz with 32KB I-cache and D-cache with
parity checking.
16KB of on-chip SRAM.
Selectable processor:bus clock ratios of N:1, N:2.
Dual bridged Processor Local Buses (PLBs) with
64- and 128-bit widths.
Double Data Rate 2/1 (DDR2/1) Synchronous
DRAM (SDRAM) interface operating up to
166MHz (333 MHz data transfer rate) with
optional ECC.
DMA support for external peripherals, internal
UART and memory.
PCI V2.2 interface (3.3V only). Thirty-two bits at
up to 66MHz.
Programmable interrupt controller supports
interrupts from a variety of sources.
Programmable General Purpose Timers (GPT).
Two Ethernet 10/100/1000Mbps half- or full-
duplex interfaces. Operational modes supported
are with packet reject, Jumbo frames, and
interrupt coalescing.
Up to four serial ports (16750 compatible UART).
External peripheral bus (32-bit data) for up to six
devices with external mastering.
Two IIC interfaces (one with bootstrap capability).
NAND Flash interface.
SPI interface.
General Purpose I/O (GPIO) interface.
JTAG interface for board level testing.
Boot from PCI memory, NOR Flash on the
external peripheral bus, or NAND Flash on the
NAND Flash interface.
Optional security feature (PPC440GRx-S).
Available in RoHS compliant, lead-free package.
Description
Designed specifically to address high-end embedded
applications, the PowerPC 440GRx (PPC440GRx)
provides a high-performance, low-power solution that
interfaces to a wide range of peripherals and
incorporates on-chip power management features.
This chip contains a high-performance RISC
processor, on-chip SRAM, DDR2/1 SDRAM controller,
PCI bus interface, control for external ROM and
peripherals, DMA with scatter/gather support, Ethernet
ports, serial ports, IIC interfaces, SPI interface, NAND
Flash interface, an optional security feature
(PPC440GRx-A), and general purpose I/O.
Technology: CMOS Cu-11, 0.13
μ
m.
Package: 35mm, 680-ball thermally enhanced plastic
ball grid array (TE-PBGA). RoHS compliant package
available.
Typical power (estimated): Approximately 3.3W at
533MHz.
Supply voltages required: 3.3V, 2.5V, 1.8V (DDR2) or
2.5V (DDR1), 1.5V.