參數(shù)資料
型號: PS2500AIT
廠商: Electronic Theatre Controls, Inc.
元件分類: XO, clock
英文描述: Low-Power Direct Digital Modulation Frequency Synthesizer
中文描述: 低功耗直接數(shù)字調(diào)制頻率合成器
文件頁數(shù): 11/28頁
文件大小: 184K
代理商: PS2500AIT
PS2500 2.2 GHz Fractional-N Frequency Synthesizer
- 11 -
Philsar Semiconductor Inc.
146 Colonnade Road S.
Nepean, Ontario, Canada
K2E 7Y1
Tel: 613-274-0922
Fax: 613-274-0915
www.philsar.com
PMP-001-DS2 V1.2
A shortened serial interface write where
/CS
is from 2 to 12
Clock
cycles wide and modulation data (2 to
12 bits) is presented on the
Mod_in
pin. The
Mod_in
is the alternate pin for entering modulation data
directly in
modulation data register
with shortened
/CS
strobes. This mode is selected through the
modulation control register
. This method of data entry also eliminates the register address overhead on the
serial interface and permits a different device than the one controlling the channel selection to enter the
modulation data (eg. a microcontroller for channel selection and a DSP for modulation data). All serial
interface bits are re-synchronized internally at the reference oscillator frequency and the content of the
modulation data register
is passed to the
modulation unit
at the next falling edge of the divided main VCO
frequency (F
pd_main
).
Modulation data samples in the
modulation data register
can be from 2 to 12 bits long, enabling the user to
select how many distinct frequency steps will be used for the desired modulation scheme.
The user can also control the frequency deviation through the
Modulation Data Magnitude Offset
in the
modulation control register
. This permits shifting of the modulation data to accomplish a 2
m
multiplication
of frequency deviation
1
.
1.
modulation data obey
The programmable range of -0.5 to +0.5 of the main
Σ
modulator can be exceeded up to the condition where the sum of the dividend and the
-0.5625
≤ (
N
mod
+
dividend
)
+0.5625
before requiring changing
N
integer
.
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