參數(shù)資料
型號: Q67121C452
英文描述: IC-SM-8-BIT CPU-12MHZ
中文描述: 集成電路釤8位CPU - 12MHz的
文件頁數(shù): 65/121頁
文件大小: 1000K
代理商: Q67121C452
Semiconductor Group
6-31
On-Chip Peripheral Components
C501
Special Function Register SCON (Address 98H)
Special Function Register SBUF (Address 99H)
Reset Value : 00H
Reset Value : XXH
Bit
Function
SM0
SM1
Serial port 0 operating mode selection bits
SM0
SM1
Selected operating mode
Serial mode 0 : Shift register, fixed baud rate (
f
OSC
/6)
0
1
Serial mode 1 : 8-bit UART, variable baud rate
Serial mode 2 : 9-bit UART, fixed baud rate (
f
OSC
/16 or
f
OSC
/32)
1
1
Serial mode 3 : 9-bit UART, variable baud rate
SM2
Enable serial port multiprocessor communication in modes 2 and 3
In mode 2 or 3, if SM2 is set to 1 then RI will not be activated if the received 9th
data bit (RB8) is 0. In mode 1, if SM2 = 1 then RI will not be activated if a valid
stop bit was not received. In mode 0, SM2 should be 0.
REN
Enable receiver of serial port
Enables serial reception. Set by software to enable serial reception. Cleared by
software to disable serial reception.
TB8
Serial port transmitter bit 9
TB8 is the 9th data bit that will be transmitted in modes 2 and 3. Set or cleared by
software as desired.
RB8
Serial port receiver bit 9
In modes 2 and 3, RB8 is the 9th data bit that was received. In mode 1, if SM2 = 0,
RB8 is the stop bit that was received. In mode 0, RB8 is not used.
TI
Serial port transmitter interrupt flag
TI is set by hardware at the end of the 8th bit time in mode 0, or at the beginning
of the stop bit in the other modes, in any serial transmission. TI must be cleared
by software.
RI
Serial port receiver interrupt flag
RI is set by hardware at the end of the 8th bit time in mode 0, or halfway through
the stop bit time in the other modes, in any serial reception (exception see SM2).
RI must be cleared by software.
9FH
9EH
9DH
9CH
9BH
9AH
99H
98H
SM0
SM1
SM2
REN
98H
SCON
Bit No.
MSB
LSB
TB8
RB8
TI
RI
99H
SBUF
7
6
5
4
3
2
1
0
Serial Interface Buffer Register
0
0
1
0
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