參數(shù)資料
型號: QL1P100-8PUN86M
廠商: QUICKLOGIC CORP
元件分類: FPGA
英文描述: FPGA, 640 CLBS, 100000 GATES, PBGA86
封裝: 6 X 6 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, TFBGA-86
文件頁數(shù): 18/44頁
文件大?。?/td> 1101K
代理商: QL1P100-8PUN86M
2010 QuickLogic Corporation
QuickLogic PolarPro Device Data Sheet — 86-Pin TFBGA QL1P100 Rev. G
25
Figure 19: Logic Cell Flip-Flop Timings—Second Waveform
Figure 20:
PolarPro Clock Network
Table 26: PolarPro Tree Clock Delay
Clock
Segment
Parameter
Commercial
Industrial
Min.
Max.
Min.
Max.
tPGCK
Delay from global clock pad input to quadrant network
1.54 ns
1.86 ns
1.56 ns
1.88 ns
tPDCK
Delay from dedicated clock pad input to quadrant
network
1.4 ns
1.66 ns
1.42 ns
1.68 ns
t
BGCK
Global clock tree delay (quad net to flip-flop)
20 ps
200 ps
30 ps
220 ps
t
GSKEW
Global delay clock skew
30 ps
190 ps
40 ps
200 ps
t
DSKEW
Dedicated clock skew
30 ps
190 ps
40 ps
200 ps
t
SU
t
CO
CLK
D
Q
t
HL
Quadrant
Clock
Network
Global Clock
Network
x4
Inversion
Mux
Quadrant
Clock
Network
Quadrant
Clock
Network
Quadrant
Clock
Network
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