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參數(shù)資料
| 型號(hào)： | R80C52XXX-12SHXXX |
| 廠商： | ATMEL CORP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁(yè)數(shù)： | 47/101頁(yè) |
| 文件大?。?/td> | 3398K |
| 代理商： | R80C52XXX-12SHXXX |
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28
Bit 5 – TX_AUTO_CRC_ON
Refer to section 6.3.5.
Bit 4 – RX_BL_CTRL
Refer to section 9.6.2.
Bit 3:2 – SPI_CMD_MODE
Refer to section 4.4.1.
Bit 1 – IRQ_MASK_MODE
The AT86RF212 supports polling of interrupt events. Interrupt polling can be enabled by
register bit IRQ_MASK_MODE. Even if an interrupt request is masked by the
corresponding bit in register 0x0E (IRQ_MASK), the event is indicated in register
0x0F (IRQ_STATUS). The different options are shown in Table 4-19.
Table 4-19. IRQ Mask Configuration
IRQ_MASK_MODE
IRQ_MASK Value
Description
0
IRQ is suppressed entirely and none of interrupt
causes are shown in register IRQ_STATUS.
0
≠ 0
All enabled interrupts are signaled on pin IRQ
and are also shown in register IRQ_STATUS.
0
IRQ is suppressed entirely but all interrupt
causes are shown in register IRQ_STATUS.
1
≠ 0
All enabled interrupts are signaled on pin IRQ
and all interrupt causes are shown in register
IRQ_STATUS.
Figure 4-17. IRQ_MASK_MODE = 0
Figure 4-18. IRQ_MASK_MODE = 1
AT86RF212
8168C-MCU Wireless-02/10
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