參數(shù)資料
型號(hào)： RH80532NC017256
元件分類： 微處理器
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 13/93頁(yè)
文件大?。?/td> 2353K
代理商： RH80532NC017256
Mobile Intel
Pentium
4 Processor-M
250686-002
Datasheet
13
to the
Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset Platform Design
Guide
and the
RS-Intel Mobile Voltage Positioning (IMVP)-III Mobile Processor Core Voltage
Regulator Specification Design Guide.
2.3.1
V
CC
Decoupling
Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR)
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the
Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset
Platform Design Guide
and the
RS-Intel Mobile Voltage Positioning (IMVP)-III Mobile Processor
Core Voltage Regulator Specification Design Guide.
2.3.2
System Bus AGTL+ Decoupling
The Mobile Intel Pentium 4 Processor-M integrates signal termination on the die and incorporates
high frequency decoupling capacitance on the processor package. Decoupling must also be
provided by the system motherboard for proper AGTL+ bus operation. For more information, refer
to the
Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset Platform Design
Guide.
2.3.3
System Bus Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the system bus interface speed as well as the core frequency of the
processor. As in previous generation processors, the Mobile Intel Pentium 4 Processor-M core
frequency is a multiple of the BCLK[1:0] frequency. The Mobile Intel Pentium 4 Processor-M bus
ratio multiplier will be set at its default ratio at manufacturing. No jumpers or user intervention is
necessary, and the processor will automatically run at the speed indicated on the package.
The Mobile Intel Pentium 4 Processor-M uses a differential clocking implementation. For more
information on Mobile Intel Pentium 4 Processor-M clocking, refer to the
CK-408 Clock Design
Guidelines
.
2.4
Voltage Identification and Power Sequencing
The VID specification for Mobile Intel Pentium 4 Processor-M is defined by the
RS-Intel Mobile
Voltage Positioning (IMVP)-III Mobile Processor Core Voltage Regulator Specification Design
Guide
. The voltage set by the VID pins is the nominal/typical voltage setting for the processor. A
minimum voltage is provided in
Table 6
and changes with frequency. This allows processors
running at a higher frequency to have a relaxed minimum voltage specification. The specifications
have been set such that one voltage regulator can work with all supported frequencies.
The Mobile Intel Pentium 4 Processor-M uses five voltage identification pins, VID[4:0], to support
automatic selection of power supply voltages. The VID pins for the Mobile Intel Pentium 4
Processor-M are open drain outputs driven by the processor VID circuitry.
Table 2
specifies the
voltage level corresponding to the state of VID[4:0]. A “1” in this table refers to a high-voltage
level and a “0” refers to low-voltage level. For more details about VR design to support the Mobile
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