參數(shù)資料
型號(hào)： RH80532NC025256
元件分類(lèi)： 微處理器
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 84/93頁(yè)
文件大小： 2353K
代理商： RH80532NC025256
Mobile Intel
Pentium
4 Processor-M Datasheet
84
Datasheet
250686-002
THERMTRIP#
Output
Assertion of THERMTRIP# (Thermal Trip) indicates the processor junction
temperature has reached a level beyond which permanent silicon damage may
occur. Measurement of the temperature is accomplished through an internal
thermal sensor which is configured to trip at approximately 135
°
C. Upon assertion
of THERMTRIP#, the processor will shut off its internal clocks (thus halting program
execution) in an attempt to reduce the processor junction temperature. To protect
the processor, its core voltage (Vcc) must be removed following the assertion of
THERMTRIP#. See
Figure 19
and
Table 21
for the appropriate power down
sequence and timing requirements. Once activated, THERMTRIP# remains latched
until RESET# is asserted. While the assertion of the RESET# signal will deassert
THERMTRIP#, if the processor’s junction temperature remains at or above the trip
level, THERMTRIP# will again be asserted.
TMS
Input
TMS (Test Mode Select) is a JTAG specification support signal used by debug
tools.
TRDY#
Input
TRDY# (Target Ready) is asserted by the target to indicate that it is ready to receive
a write or implicit writeback data transfer. TRDY# must connect the appropriate pins
of all system bus agents.
TRST#
Input
TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be driven
low during power on Reset. This can be done with a 680 ohm pull-down resistor.
V
CCA
Input
V
provides isolated power for the internal processor core PLL’s. Refer to the
Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset Platform
Design Guide
for complete implementation details.
V
CCIOPLL
Input
V
provides isolated power for internal processor system bus PLL’s. Follow the
guidelines for V
, and refer to the
Mobile Intel
Pentium
4 Processor-M and
Intel
845MP/845MZ Chipset Platform Design Guide
for complete implementation
details.
V
CCSENSE
Output
V
is an isolated low impedance connection to processor core power (V
CC
). It
can be used to sense or measure power near the silicon with little noise.
VCCVID
Input
Independent 1.2-V supply must be routed to VCCVID pin for the Mobile Intel
Pentium 4 Processor-M’s Voltage Identification circuit.
VID[4:0]
Output
VID[4:0] (Voltage ID) pins are used to support automatic selection of power supply
voltages (Vcc). Unlike some previous generations of processors, these are open
drain signals that are driven by the Mobile Intel Pentium 4 Processor-M and must
be pulled up to 3.3V (max.) with 1Kohm resistors. The voltage supply for these pins
must be valid before the VR can supply Vcc to the processor. Conversely, the VR
output must be disabled until the voltage supply for the VID pins becomes valid.
The VID pins are needed to support the processor voltage specification variations.
See
Table 2
for definitions of these pins. The VR must supply the voltage that is
requested by the pins, or disable itself.
V
SSA
Input
V
SSA
is the isolated ground for internal PLLs.
V
SSSENSE
Output
V
is an isolated low impedance connection to processor core V
SS
. It can be
used to sense or measure ground near the silicon with little noise.
Table 36. Signal Description (Page 8 of 8)
Name
Type
Description
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參數(shù)描述
RH80532NC029256 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Microprocessor
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RH80532NC049256S-L8SB 制造商:Intel 功能描述:INTEL CELERON PROCESSOR AVAILABLE AT 1.60 GHZ, 1.8 GHZ, 2.00 GHZ, 2.2 GHZ
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