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Datasheet
13
Intel
Pentium
III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
For the processor to fully realize the low current consumption of the Stop-Grant, Sleep and Deep
Sleep states, a Model Specific Register (MSR) bit must be set. For the MSR at 02AH (Hex), bit 26
must be set to a ‘1’ (this is the power on default setting) for the processor to stop all internal clocks
during these modes. For more information, see the
Intel Architecture Software Developer’s
Manual, Volume 3: System Programming Guide
.
2.2.1
Normal State—State 1
This is the normal operating state for the processor.
2.2.2
AutoHALT Powerdown State—State 2
AutoHALT is a power state entered when the processor executes the HALT instruction. The
processor transitions to the Normal state upon the occurrence of SMI#, INIT#, or LINT[1:0] (NMI,
INTR). RESET# causes the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the AutoHALT Power Down state. See the
Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide
for more information.
FLUSH# is serviced during the AutoHALT state, and the processor will return to the AutoHALT
state.
Figure 3. Stop Clock State Machine
PCB757a
2. Auto HALT Power Down State
BCLK running.
Snoops and interrupts allowed.
HALT Instruction and
HALT Bus Cycle Generated
INIT#, BINIT#, INTR,
SMI#, RESET#
1. Normal State
Normal execution.
STPCLK#
Asserted
STPCLK#
De-asserted
3. Stop Grant State
BCLK running.
Snoops and interrupts allowed.
SLP#
Asserted
SLP#
De-asserted
5. Sleep State
BCLK running.
No snoops or interrupts allowed.
BCLK
Input
Stopped
BCLK
Input
Restarted
6. Deep Sleep State
BCLK stopped.
No snoops or interrupts allowed.
4. HALT/Grant Snoop State
BCLK running.
Service snoops to caches.
Snoop Event Occurs
Snoop Event Serviced
Snoop
Event
Occurs
Snoop
Event
Serviced
STPCLK# Asserted
STPCLK# De-asserted
and Stop-Grant State
entered from
AutoHALT