
RS5C372B
- 22 -
S
A
A
Data
/A P
S
A
A
/A
1
0
A
1
0
0 1
0
Transmission of
slave address
(0110010)
1
A
Data
A
Data
R/W=1(Read)
P
Data
Data
Example3 of data read (when data is read from Fh-3h)
Reading of data
from the Internal
Address 0h
Reading of data
from the Internal
Address 1h
Reading of data
from the Internal
Address 2h
Reading of data
from the Internal
Address 3h
Reading of data
from the Internal
Address Fh
Master to slave
Slave to master
Start Condition
Acknowledge
Stop Condition
1.2.8. Data transmission under special condition
The RS5C372B holds the clock tentatively for duration from Start Condition to Stop Condition to avoid
invalid read or write clock on carrying clock. When clock is carried during this period, which will be
adjusted within approx. 61μs from Stop Condition. To prevent invalid read or write clock shall be made
during one transmission operation (from Start Condition to Stop Condition). When 0.5 to 1.0 second
elapses after start condition any access to the RS5C372B is automatically released to release tentative hold
of the clock, set Fh to the address pointer, and access from the CPU is forced to be terminated (the same
action as made stop condition is received: Automatic Resume Function from the I
2
C-Bus interface).
Therefore, one access must be completed within 0.5 seconds. The Automatic Resume Function prevents
delay in clock even if the SCL is stopped from sudden failure of the system during clock read operation.
Also a second Start Condition after the first Start Condition and before the Stop Condition is regarded as the
“Repeated Start Condition.” Therefore, when 0.5 to 1.0 seconds passed after the first Start Condition,
access to the RS5C372B is automatically released.
If access is tried after Automatic Resume Function is activated, no Acknowledge signal will be output for
writing while FFh will be output for reading.
Access to the real-time clock
1) No stop condition shall be generated until clock read/write is started and completed.
2) One clock read/write operation shall be completed within 0.5 seconds.
The user shall always be able to access the real-time clock as long as these two conditions are met.
Bad example of reading from seconds to hours (invalid read)
(Start condition)
→
(Read of seconds)
→
(Read of minutes)
→
(Stop condition)
→
(Start condition)
→
(Read
of hour)
→
(Stop condition)
Assuming read was started at 05:59:59 P.M. and while reading seconds and minutes the time advanced to
06:00:00 P.M. At this time second digit is hold so the read as 05:59:59. Then the RS5C372B confirms
(Stop condition) and carries second digit being hold and the time changes to 06:00:00 P.M. Then, when
the hour digit is read, it changes to 6. The wrong results of 06:59:59 will be read.