參數(shù)資料
型號(hào)： RTL8100C
廠商： Electronic Theatre Controls, Inc.
英文描述： SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述： 單芯片快速以太網(wǎng)控制器電源管理
文件頁(yè)數(shù)： 48/73頁(yè)
文件大小： 652K
代理商： RTL8100C
RTL8100C & RTL8100CL
Datasheet
Single-Chip Fast Ethernet Controller
40
Track ID: JATR-1076-21 Rev. 1.06
Table 41. PCI Configuration Space Functions
Description
Reserved.
Fast Back-To-Back Enable.
Config3<FBtBEn>=0:Read as 0. Write operation has no effect. The RTL8100C(L) will not generate
Fast Back-to-back cycles.
When Config3<FbtBEn>=1, this read/write bit controls whether or not a master can do fast
back-to-back transactions to different devices. Initialization software will set the bit if all targets are
fast back-to-back capable.
1: The master is allowed to generate fast back-to-back transaction to different agents
0: Fast back-to-back transactions are only allowed to the same agent
This bit’s state after RST# is 0.
System Error Enable.
1: The RTL8100C(L) asserts the SERRB pin when it detects a parity error on the address phase
(AD<31:0> and CBEB<3:0>)
Address/Data Stepping.
Read as 0. Write operation has no effect.
The RTL8100C(L) never performs address/data stepping.
Parity Error Response.
1: The RTL8100C(L) will assert the PERRB pin on detection of a data parity error when acting as
the target, and will sample the PERRB pin as the master
0: Any detected parity error is ignored and the RTL8100C(L) continues normal operation
Parity checking is disabled after hardware reset (RSTB).
VGASNOOP VGA palette SNOOP.
Read as 0. Write operation has no effect.
MWIEN
Memory Write and Invalidate cycle Enable.
Read as 0. Write operation has no effect.
SCYCEN
Special Cycle Enable.
Read as 0. Write operation has no effect.
The RTL8100C(L) ignores all special cycle operations.
BMEN
Bus Master Enable.
1: The RTL8100C(L) is capable of acting as a bus master
0: The RTL8100C(L) is prohibited from acting as a PCI bus master
Normally this bit is set by the system BIOS.
MEMEN
Memory Space Access.
1: The RTL8100C(L) responds to memory space accesses
0: The RTL8100C(L) ignores memory space accesses
IOEN
I/O Space Access.
1: The RTL8100C(L) responds to IO space accesses
0: The RTL8100C(L) ignores I/O space accesses
Bit
15-10
9
Symbol
-
FBTBEN
8
SERREN
7
ADSTEP
6
PERRSP
5
4
3
2
1
0
相關(guān)PDF資料
PDF描述
RTL8100C-LF SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8100CL SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8130 REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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RTL8100B REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RTL8100CL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8100C-LF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8100CL-LF 制造商:Realtek Semiconductor 功能描述:RTL8100CL Series 3.6 V Fast Ethernet Controller with Power Management LQFP-128
RTL8100L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8101 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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