參數(shù)資料
型號： RTL8139C
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述： 瑞昱3.3V的單芯片快速以太網(wǎng)控制器電源管理
文件頁數(shù)： 31/62頁
文件大?。?/td> 648K
代理商： RTL8139C
RTL8139C(L)
2002/01/10
Rev.1.4
31
6.30 Function Event Register
(Offset 00F0h-00F3h, R/W)
Bit
R/W
31-16
-
15
R/W
Symbol
-
INTR
Description
Reserved
Interrupt:
This bit is set to 1 when INTR field in the Function Force
Event Register is set. Writing a 1 may clear this bit. Writing a 0 has no
effect. This bit is not affected by the RST# pin and software reset.
Reserved
General Wakeup:
This bit is set to 1 when the GWAKE field in the
Function Present State Register changes its state from 0 to 1. This bit
can also be set when the GWAKE bit of the Function Force Register is
set. Writing a 1 may clear this bit. Writing a 0 has no effect. This bit is
not affected by the RST# pin.
Reserved
14-5
4
-
-
R/W
GWAKE
3-0
-
-
This register is valid only when Card_En=1 (bit3, Config3) and FuncRegEn=1 (bit1, Config3).
The Function Event (Offset F0h), Function Event Mask (Offset F4h), Function Present State (Offset F8h), and Function
Force Event (Offset FCh) registers have some corresponding fields with the same names. The GWAKE and INTR bits
of these registers reflect the wake-up event signaled on the SCTCSCHG pin. The operation of CSTCSCHG pin is similar
to PME# pin except that the CSTCSCHG pin is asserted high.
6.31 Function Event Mask Register
(Offset 00F4h-00F7h, R/W)
Bit
R/W
31-16
-
15
R/W
Symbol
-
INTR
Description
Reserved
Interrupt mask:
When cleared (0), setting of the INTR bit in either
the Function Present State Register or the Function Event Register
will neither cause assertion of the INT# signal while the CardBus PC
Card interface is powered up, nor the system Wakeup (CSTSCHG)
while the interface is powered off. Setting this bit to 1, enables the
INTR bit in both the Function Present State Register and the Function
Event Register to generate the INT# signal (and the system Wakeup if
the corresponding WKUP field in this Function Event Mask Register
is also set). This bit is not affected by the RST# pin.
Wakeup mask:
When cleared (0), the Wakeup function is disabled, i.e.,
the setting of this bit in the Function Event Register will not assert the
CSTSCHG signal. Setting this bit to 1, enables the fields in the
Function Event Register to assert the CSTSCHG signal. This bit is not
affected by RST#.
Reserved
General Wakeup mask:
When cleared (0), setting this bit in the
Function Event Register will not cause the CSTSCHG pin to be
asserted. Setting this bit to 1, enables the GWAKE field in the
Function Event Register to assert CSTSCHG pin if bit14 of this
register is also set. This bit is not affected by RST#.
Reserved
14
R/W
WKUP
13-5
4
-
-
R/W
GWAKE
3-0
-
-
This register is valid only when Card_En=1 (bit3, Config3) and FuncRegEn=1 (bit1, Config3).
相關(guān)PDF資料
PDF描述
RTL8139L REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139 REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139A REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139B REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139D REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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RTL8139CL+ 制造商:Realtek Semiconductor 功能描述:
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RTL8139D(L) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8139D(L) Specification
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