參數(shù)資料
型號(hào)： S12BDLCV1D
廠商： Motorola, Inc.
英文描述： MC9S12DT128 Device User Guide V02.09
中文描述： MC9S12DT128設(shè)備的用戶手冊(cè)V02.09
文件頁數(shù)： 109/138頁
文件大?。?/td> 2083K
代理商： S12BDLCV1D
MC9S12DT128 Device User Guide — V02.09
109
A.2.3 ATD accuracy
Table A-10
specifies the ATD conversion performance excluding any errors due to current injection,
input capacitance and source resistance.
Table A-10 ATD Conversion Performance
For the following definitions see also
Figure A-1
.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps.
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
Conditions are shown in
Table A-4
unless otherwise noted
V
REF
= V
RH
- V
RL
= 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV
f
ATDCLK
= 2.0MHz
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P 10-Bit Resolution
LSB
5
mV
2
P 10-Bit Differential Nonlinearity
DNL
–1
1
Counts
3
P 10-Bit Integral Nonlinearity
INL
–2.5
±
1.5
2.5
Counts
4
P 10-Bit Absolute Error
1
NOTES
:
1. These values include the quantization error which is inherently 1/2 count for any A/D converter.
AE
-3
±
2.0
3
Counts
5
P 8-Bit Resolution
LSB
20
mV
6
P 8-Bit Differential Nonlinearity
DNL
–0.5
0.5
Counts
7
P 8-Bit Integral Nonlinearity
INL
–1.0
±
0.5
1.0
Counts
8
P 8-Bit Absolute Error
(1)
AE
-1.5
±
1.0
1.5
Counts
DNL i
( )
V
i
------------------------
V
i
1
–
–
1LSB
1
–
=
INL n
DNL i
( )
i
1
=
n
∑
V
n
1LSB
V
0
–
-------------------
n
–
=
=
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