參數(shù)資料
型號(hào): S12BDLCV1D
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設(shè)備的用戶手冊(cè)V02.09
文件頁數(shù): 86/138頁
文件大?。?/td> 2083K
代理商: S12BDLCV1D
MC9S12DT128 Device User Guide — V02.09
86
6.4 HCS12 Interrupt (INT) Block Description
Consult the INT Block Guide for information on the HCS12 Interrupt module.
6.5 HCS12 Background Debug Module (BDM) Block Description
Consult the BDM Block Guide for information on the HCS12 Background Debug module.
6.5.1 Device-specific information
When the BDM Block Guide refers to
alternate clock
this is equivalent to
oscillator clock
.
6.6 HCS12 Breakpoint (BKP) Block Description
Consult the BKP Block Guide for information on the HCS12 Breakpoint module.
Section 7 Clock and Reset Generator (CRG) Block
Description
Consult the CRG Block User Guide for information about the Clock and Reset Generator module.
7.1 Device-specific information
The Low Voltage Reset feature of the CRG is not available on this device.
Section 8 Oscillator (OSC) Block Description
Consult the OSC Block User Guide for information about the Oscillator module.
8.1 Device-specific information
The XCLKS input signal is active low (see
2.3.12
PE / NOACC / XCLKS
Port E I/O Pin 7
).
Section 9 Enhanced Capture Timer (ECT) Block
Description
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