參數(shù)資料
型號: S12BDLCV1D
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設備的用戶手冊V02.09
文件頁數(shù): 122/138頁
文件大?。?/td> 2083K
代理商: S12BDLCV1D
MC9S12DT128 Device User Guide — V02.09
122
This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the
effect of the jitter to a large extent.
Table A-16 PLL Characteristics
Conditions are shown in
Table A-4
unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P Self Clock Mode frequency
f
SCM
1
5.5
MHz
2
D VCO locking range
f
VCO
8
50
MHz
3
D
Lock Detector transition from Acquisition to Tracking
mode
|
trk
|
3
4
%
1
NOTES
:
1. % deviation from target frequency
2. f
OSC
= 4MHz, f
BUS
= 25MHz equivalent f
VCO
= 50MHz: REFDV = #$03, SYNR = #$018, Cs = 4.7nF, Cp = 470pF, Rs =
10K
.
4
D Lock Detection
|
Lock
|
0
1.5
%
(1)
5
D Un-Lock Detection
|
unl
|
0.5
2.5
%
(1)
6
D
Lock Detector transition from Tracking to Acquisition
mode
|
unt
|
6
8
%
(1)
7
C PLLON Total Stabilization delay (Auto Mode)
2
t
stab
0.5
ms
8
D PLLON Acquisition mode stabilization delay
(2)
t
acq
0.3
ms
9
D PLLON Tracking mode stabilization delay
(2)
t
al
0.2
ms
10
D Fitting parameter VCO loop gain
K
1
-100
MHz/V
11
D Fitting parameter VCO loop frequency
f
1
60
MHz
12
D Charge pump current acquisition mode
| i
ch
|
38.5
μ
A
13
D Charge pump current tracking mode
| i
ch
|
3.5
μ
A
14
C Jitter fit parameter 1
(2)
j
1
1.1
%
15
C Jitter fit parameter 2
(2)
j
2
0.13
%
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