參數(shù)資料
型號(hào): S71GL064A08BAI0F3
廠商: SPANSION LLC
元件分類(lèi): 存儲(chǔ)器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA56
封裝: 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁(yè)數(shù): 73/134頁(yè)
文件大?。?/td> 2383K
代理商: S71GL064A08BAI0F3
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February 8, 2005 S71GL064A_00_A2
S71GL064A based MCPs
41
Advance
Informatio n
Autoselect Command Sequence
The autoselect command sequence allows the host system to read several identifier codes at
specific addresses:
Note: The device ID is read over three cycles. SA = Sector Address
The autoselect command sequence is initiated by first writing two unlock cycles. This is fol-
lowed by a third write cycle that contains the autoselect command. The device then enters
the autoselect mode. The system may read at any address any number of times without ini-
tiating another autoselect command sequence:
The system must write the reset command to return to the read mode (or erase-suspend-
read mode if the device was previously in Erase Suspend).
Enter Secured Silicon Sector/Exit Secured Silicon
Sector Command Sequence
The Secured Silicon Sector region provides a secured data area containing an 8-word/16-byte
random Electronic Serial Number (ESN). The system can access the Secured Silicon Sector
region by issuing the three-cycle Enter Secured Silicon Sector command sequence. The de-
vice continues to access the Secured Silicon Sector region until the system issues the four-
cycle Exit Secured Silicon Sector command sequence. The Exit Secured Silicon Sector com-
mand sequence returns the device to normal operation. Table 10 shows the address and data
requirements for both command sequences. See also “Secured Silicon Sector Flash
Memory Region” for further information. Note that the ACC function and unlock bypass modes
are not available when the Secured Silicon Sector is enabled.
Word Program Command Sequence
Programming is a four-bus-cycle operation. The program command sequence is initiated by
writing two unlock write cycles, followed by the program set-up command. The program ad-
dress and data are written next, which in turn initiate the Embedded Program algorithm. The
system is not required to provide further controls or timings. The device automatically pro-
vides internally generated program pulses and verifies the programmed cell margin. Tables
31 and 32 show the address and data requirements for the word program command se-
quence, respectively.
When the Embedded Program algorithm is complete, the device then returns to the read
mode and addresses are no longer latched. The system can determine the status of the pro-
gram operation by using DQ7 or DQ6. Refer to the Write Operation Status section for
information on these status bits. Any commands written to the device during the Embedded
Program Algorithm are ignored. Note that the Secured Silicon Sector, autoselect, and CFI
functions are unavailable when a program operation is in progress. Note that a hardware
reset immediately terminates the program operation. The program command sequence
should be reinitiated once the device has returned to the read mode, to ensure data integrity.
Identifier Code
A7:A0
(x16)
A6:A-1
(x8)
Manufacturer ID
00h
Device ID, Cycle 1
01h
02h
Device ID, Cycle 2
0Eh
1Ch
Device ID, Cycle 3
0Fh
1Eh
Secured Silicon Sector Factory Protect
03h
06h
Sector Protect Verify
(SA)02h
(SA)04h
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S71GL064A08BAW0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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