參數(shù)資料
型號： SAA2022GP
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： Tape formatting and error correction for the DCC system
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, SOT-208A, QFP-64
文件頁數(shù)： 24/52頁
文件大?。?/td> 208K
代理商： SAA2022GP
February 1994
24
Philips Semiconductors
Product specification
Tape formatting and error
correction for the DCC system
SAA2022
Notes to Fig.16a.
Note
1. See interface timing (Fig.16b) for the transfer of a byte to the microcontroller.
DESCRIPTION
TIMING
For the timing figures it is assumed that cycle time T
cy
of MCLK is within the limits 160 ns < T
cy
< 165 ns
The set-up time t
su
of LTEN, LTCNT, LTCLK and LTDATA to MCLK HIGH
t
su
< 40 ns
The hold time t
h
of LTEN, LTCNT, LTCLK and LTDATA to MCLK HIGH
t
h
= 0 ns
LTEN LOW time before start data transfer
t
LE
> 535 ns; note 1
LTCLK LOW time
t
Lc
> 205 ns
LTCLK HIGH time
t
Hc
> 205 ns
LTCNT0/1 set-up time to LTEN HIGH
t
su1
> 205 ns
LTCNT0/1 hold time to LTEN HIGH
t
h1
> 205 ns
LTEN set-up time to LTCLK LOW
t
su2
> 0 ns
LTEN hold time to LTCLK HIGH
t
h2
> 205 ns
LTDATA set-up time to LTCLK HIGH
t
su3
> 205 ns
LTDATA hold time to LTCLK HIGH
t
h3
> 40 ns
LTCLK set-up time to LTEN HIGH
t
su4
> 535 ns
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