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參數(shù)資料
| 型號： | SAA4977H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Besic |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, SOT-318-2, QFP-80 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 186K |
| 代理商： | SAA4977H |
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1998 Jul 23
18
Philips Semiconductors
Preliminary specification
Besic
SAA4977H
7.11
I
2
C-bus control registers
ADDRESS
BIT
NAME
DESCRIPTION
Subaddress 00H to 2FH: reserved;
note 1
Subaddress 30H to 32H (AGC)
30H
31H
32H
0 to 7
0 to 7
0
1
2
3
4 to 7
AGC_Y
AGC_UV
AGC_Y
AGC_UV
standby_f
aaf_bypass
AGC gain for Y channel (2’s complement relative to 0 dB): upper 8 bits
AGC gain for U and V channel (2’s complement relative to 0 dB): upper 8 bits
AGC gain for Y channel LSB
AGC gain for UV channel LSB
front-end in standby mode if HIGH
bypass for prefilter if HIGH
reserved
Subaddress 33H (UV clamp correction)
33H
0 and 1 UVclcor_mode
2 to 4
Uclcor_fval
5 to 7
Vclcor_fval
clamp correction mode = auto, fixed, keep, reserved
fixed value for clamp correction U channel
fixed value for clamp correction V channel
Subaddress 34H (UV coring)
34H
0 and 1 UVcoring
2 and 3
4 and 5 UVcl_tau
6 and 7
coring level = 0,
±
0.5,
±
1 and
±
2 LSB
reserved
vertical filtering of measured clamp
reserved
Subaddress 35H (Y delay)
35H
0 to 2
3 and 4 overl_thr
5
6 and 7
ydelay_f
variable Y-delay in LLA clock cycles:
4,
3,
2,
1, 0, 1, 2 and 3
overload threshold: (216, 224, 232, 240)
fill memory with constant value if HIGH
reserved
fill_mem
Subaddress 36H and 37H (DCTI)
36H
0 to 2
3 to 6
7
0 and 1 dcti_limit
2
3
4
5
6 and 7
dcti_gain
dcti_threshold
dcti_ddx_sel
DCTI gain: 0, 1, 2, 3, 4, 5, 6 and 7
DCTI threshold: 0, 1 to 15
DCTI selection of first differentiating filter; see Fig.3
DCTI limit for pixel shift range: 0, 1, 2 and 3
DCTI separate processing of U and V signals; 0 = off, 1 = on
DCTI over the hill protection; 0 = off, 1 = on
DCTI post-filter; 0 = off, 1 = on
DCTI super hill mode; 0 = off, 1 = on
reserved
37H
dcti_separate
dcti_protection
dcti_filteron
dcti_superhill
Subaddress 38H and 3AH (peaking)
38H
0 to 2
3 to 5
6 and 7
pk_alpha
pk_beta
peaking alpha:
1
16
(0, 1, 2, 3, 4, 5, 6, 8)
peaking beta:
1
16
(0, 1, 2, 3, 4, 5, 6, 8)
reserved
相關(guān)PDF資料 |
PDF描述 |
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| SAA4978 | Picture Improved Combined Network PICNIC |
| SAA4978H | Picture Improved Combined Network PICNIC |
| SAA4979H | Sample rate converter with embedded high quality dynamic noise reduction and expansion port |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA4978 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Picture Improved Combined Network PICNIC |
| SAA4978H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Picture Improved Combined Network PICNIC |
| SAA4979H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Sample rate converter with embedded high quality dynamic noise reduction and expansion port |
| SAA4981 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Monolithic integrated 16 : 9 compressor |
| SAA4981T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Monolithic integrated 16 : 9 compressor |
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