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參數(shù)資料
| 型號(hào)： | SAA7715 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Digital Signal Processor |
| 中文描述： | 數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大小： | 180K |
| 代理商： | SAA7715 |
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2001 May 07
17
Philips Semiconductors
Preliminary specification
Digital Signal Processor
SAA7715H
9.7
I
2
C-bus memory map specification
The I
2
C-bus memory map contains all defined I
2
C-bus bits. The map is split up in two different sections: the hardware
memory registers and the RAM definitions. In Table 8 the preliminary memory map is depicted. The hardware registers
are memory map on the XRAM of DSP. Table 9 shows the detailed memory map of those locations. All locations are
acknowledged by the SAA7715 even if the user tries to write to a reserved space. The data in these sections will be lost.
Reading from these locations will result in undefined data words.
Table 8
I
2
C-bus memory map
Table 9
I
2
C-bus memory map overview
ADDRESS
FUNCTION
SIZE
8000H to 87FFH
DSP to PROM (not readable via
I
2
C-bus)
DSP and general control
DSP to PRAM
DSP to YRAM
I
2
C-bus register
DSP to XRAM
2k
×
32 bits
602FH
2000H to 25FFH
1000H to 01FFH
0FF2H to 0FF5H, 0FFBH
0000H to 09FFH
1
×
24 bits
1.5k
×
32 bits
512
×
12 bits
1
×
24 bits
2.5k
×
24 bits
ADDRESS
DESCRIPTION
Hardware registers
0FFBH
0FF5H
0FF4H
0FF3H
0FF2H
Selector register 1
SPDIF IN channel status register 1 left
SPDIF IN channel status register 2 left
SPDIF IN channel status register 1 right
SPDIF IN channel status register 2 right
DSP control
602FH
DSP and general control register
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| SAA7750-N1D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Generic device for portable multimedia applications |
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