參數(shù)資料
型號(hào)： SAA7715
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)字信號(hào)處理
英文描述： Digital Signal Processor
中文描述： 數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 6/36頁(yè)
文件大?。?/td> 180K
代理商： SAA7715
2001 May 07
6
Philips Semiconductors
Preliminary specification
Digital Signal Processor
SAA7715H
7
PINNING
SYMBOL
PIN
PIN TYPE
DESCRIPTION
IIS_BCK1
IIS_WS1
IIS_IN1
RESERVED1
IIS_IN4
IIS_IN2
RESERVED2
RESERVED3
IIS_IN3
V
SSI2
A0
SCL
SDA
V
SSI1
V
SSA2
V
DDI1
V
DDA2
DSP_RESET
RTCB
SHTCB
V
SSE
CLK_IN
V
DDE
SPDIF2
SPDIF1
TSCAN
SYSCLK
IIS_OUT4
IIS_OUT3
IIS_OUT2
IIS_OUT1
IIS_WS
IIS_BCK
VOUTL
V
DDA1
VOUTR
V
SSA1
VREFDA
POM
POWERDOWN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
ipthdt5v
vssi
ipthdt5v
iptht5v
iic400kt5v
vssis
vssco
vddi
vddco
ipthut5v
ipthdt5v
ipthdt5v
vsse
iptht5v
vdde
apio
apio
ipthdt5v
bpt4mthdt5v
ops5c
ops5c
ops5c
ops5c
ops5c
ops5c
apio
vddo
apio
vsso
apio
apio
iptht5v
bit clock signal belonging to data of digital serial inputs 1 to 4
word select signal belonging to data of digital serial inputs 1 to 4
data pin of digital serial input 1
not to be connected externally
data pin of digital serial input 4
data pin of digital serial input 2
not to be connected externally
not to be connected externally
data pin of digital serial input 3
ground supply (core only) (bond out to 2 pads)
slave sub-address I
2
C-bus selection/serial data input test control block
clock input of I
2
C-bus
data input/output of I
2
C-bus
ground supply (core only)
ground supply analog of PLL, WS_PLL, SPDIF input stage
positive supply (core only) (bond out to 2 pads)
positive supply analog of PLL, WS_PLL, SPDIF input stage
general reset of chip (active LOW)
asynchronous reset test control block, connect to ground (internal pull down)
shift clock test control block (internal pull down)
ground supply (peripheral cells only)
system clock input
positive supply (peripheral cells only)
SPDIF2 data input (internally multiplexed with digital serial input 3)
SPDIF1 data input (internally multiplexed with digital serial input 2)
scan control active HIGH (internal pull down)
n
×
f
s
output of SAA7715
data pin of digital serial output 4
data pin of digital serial output 3
data pin of digital serial output 2
data pin of digital serial output 1
word select output belonging to digital serial output 1 to 4
bit clock output belonging to digital serial output 1 to 4
analog left output pin.
FSDAC positive supply voltage (bond out to 2 pads)
analog right output pin
FSDAC ground supply voltage (bond out to 2 pads)
voltage reference pin of FSDAC
power-on mute pin of FSDAC
standby mode of chip
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