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參數(shù)資料
| 型號： | SAA8200HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Ensation Base integrated wireless audio baseband |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 16/71頁 |
| 文件大小： | 298K |
| 代理商： | SAA8200HL |
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SAA8200HL_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 17 October 2005
16 of 71
Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
0x003C
0x0040
0x0044
0x0048
0x004C
0x0050
0x0054
0x0058
0x005C
0x0060
0x0064
0x0068
0x006C
0x0070
0x0074
0x0078
0x007C
0x0080
0x0084
0x0088
0x008C
0x0090
0x0094
0x0098
0x009C
0x00A0
0x00A4
0x00A8
0x00AC
0x00B0
0x00B4
0x00B8
0x00BC
0x00C0
0x00C4
0x00C8
0x00CC
0x00D0
0x00D4
0x00D8
0x00DC
FS1_ I2SIN_1
FS1_ I2SIN_2
FS1_ I2SOUT
FS1_ SRI_GCHCLK
FS1_ CR_CLK_OUT1
FS1_ CR_CLK_OUT2
FS1_ SRI_CHCLK
FS2_ LP0
FS2_ HP0
FS2_ DCDC
FS2_ SPDIF
FS2_ I2SIN_1
FS2_ I2SIN_2
FS2_ I2SOUT
FS2_ SRI_GCHCLK
FS2_ CR_CLK_OUT1
FS2_ CR_CLK_OUT2
FS2_ SRI_CHCLK
SSR_ LP0
SSR_ HP0
SSR_ DCDC
SSR_ SPDIF
SSR_ I2SIN_1
SSR_ I2SIN_2
SSR_ I2SOUT
SSR_ SRI_GCHCLK
SSR_ CR_CLK_OUT1
SSR_ CR_CLK_OUT2
SSR_ SRI_CHCLK
PCR_SPD_SYSCLK
PCR_SYSCLK_DIV4
PCR_UART_UCLK
PCR_VPB1_PCLK
PCR_UART_PCLK
PCR_DEBOUNCE_PCLK
PCR_CGU_PCLK
PCR_WDOG_PCLK
PCR_ADC_PCLK
PCR_IOCONF_PCLK
PCR_EVENT_ROUTER_PCLK
PCR_SRI_I2C_PCLK
frequency select side 1 for I2SIN_1 bit clock
frequency select side 1 for I2SIN_2 bit clock
frequency select side 1 for I2SOUT bit clock
frequency select side 1 for SRI gated channel clock
frequency select side 1 for CR output 1 clock
frequency select side 1 for CR output 2 clock
frequency select side 1 for SRI reference channel clock
frequency select side 2 for system PLL clock
frequency select side 2 for audio PLL clock
frequency select side 2 for DC-to-DC converter clock
frequency select side 2 for SPDIF clock
frequency select side 2 for I2SIN_1 bit clock
frequency select side 2 for I2SIN_2 bit clock
frequency select side 2 for I2SOUT bit clock
frequency select side 2 for SRI gated channel clock
frequency select side 2 for CR output 1 clock
frequency select side 2 for CR output 2 clock
frequency select side 2 for SRI reference channel clock
frequency select status for system PLL clock
frequency select status for audio PLL clock
frequency select status for DC-to-DC converter clock
frequency select status for SPDIF clock
frequency select status for I2SIN_1 bit clock
frequency select status for I2SIN_2 bit clock
frequency select status for I2SOUT bit clock
frequency select status for SRI gated channel clock
frequency select status for CR output 1 clock
frequency select status for CR output 2 clock
frequency select status for SRI reference channel clock
power control register for system clock
power control register for 0.25
×
f
s
system clock
power control register for UART clock
power control register for VPB1 bus clock
power control register for UART bus clock
power control register for DEBOUNCE bus clock
power control register for CGU bus clock
power control register for WDOG bus clock
power control register for control ADC bus clock
power control register for IO configuration bus clock
power control register for event router bus clock
power control register for SRI I
2
C-bus clock
Table 11:
Base address Offset
VPB0 bridge interface description
…continued
Key
Description
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| SAA8200HL/N100,518 | 制造商:ST-Ericsson 功能描述:SAA8200HL Series Ensation Base Integrated Wireless Audio Baseband - LQFP-100 |
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| SA-A871-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
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