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| 型號(hào)： | SAH-XC2387C-136F100L |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, LQFP-144 |
| 文件頁(yè)數(shù)： | 125/147頁(yè) |
| 文件大?。?/td> | 1798K |
| 代理商： | SAH-XC2387C-136F100L |
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XC2387C, XC2388C
XC2000 Family Derivatives / High Line
Functional Description
Data Sheet
79
V1.2, 2010-09
Clock control, address decoding, and service request control are managed outside the
E-Ray module kernel.
FlexRay Module Features
For communication on a FlexRay network, individual Message Buffers with up to 254
data bytes are configurable. The message storage consists of a single-ported Message
RAM that holds up to 128 Message Buffers. All functions concerning the handling of
messages are implemented in the Message Handler. Those functions are the
acceptance filtering, the transfer of messages between the two FlexRay Channel
Protocol Controllers and the Message RAM, maintaining the transmission schedule as
well as providing message status information.
The register set of the E-Ray IP-module can be accessed directly by an external Host
via the module’s Host interface. These registers are used to control/configure/monitor
the FlexRay Channel Protocol Controllers, Message Handler, Global Time Unit,
System Universal Control, Frame and Symbol Processing, Network Management,
Service Request Control, and to access the Message RAM via Input / Output Buffer.
The E-Ray IP-module supports the following features:
Conformance with FlexRay protocol specification V2.1
Data rates of up to 10 Mbit/s on each channel
Up to 128 Message Buffers configurable
8 Kbytes of Message RAM for storage of e.g. 128 Message Buffers with max.
48 bytes data field or up to 30 Message Buffers with 254 bytes Data Sections
Configuration of Message Buffers with different payload lengths possible
One configurable receive FIFO
Each Message Buffer can be configured as receive buffer, as transmit buffer or as
part of the receive FIFO
Host access to Message Buffers via Input and Output Buffer.
Input Buffer: Holds message to be transferred to the Message RAM
Output Buffer: Holds message read from the Message RAM
Filtering for slot counter, cycle counter, and channel
Maskable module service requests
Network Management supported
Four service request lines
Automatic delayed read access to Output Command Request Register (OBCR) if a
data transfer from Message RAM to Output Shadow Buffer (initiated by a previous
write access to the OBCR) is ongoing.
Automatic delayed read access to Input Command Request Register (IBCR) if a data
transfer from Input Shadow Buffer to Message RAM to (initiated by a previous write
access to the IBCR) is ongoing.
Four Input Buffers for building up transmission Frames in parallel.
Flag indicating which Input Buffer is currently accessible by the host.
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| SAF-XC2388C-200F100L | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
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