參數(shù)資料
型號： SAH-XC2387C-136F100L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-144
文件頁數(shù)： 34/147頁
文件大?。?/td> 1798K
代理商： SAH-XC2387C-136F100L
XC2387C, XC2388C
XC2000 Family Derivatives / High Line
Electrical Parameters
Data Sheet
129
V1.2, 2010-09
duration of an asynchronous READY signal for safe synchronization is one CLKOUT
period plus the input setup time.
An active READY signal can be deactivated in response to the trailing (rising) edge of
the corresponding command (RD or WR).
If the next bus cycle is controlled by READY, an active READY signal must be disabled
before the first valid sample point in the next bus cycle. This sample point depends on
the programmed phases of the next cycle.
Figure 25
READY Timing
MC_X_EBCREADY
READY
Asynchron.
Not Rdy
READY
Data Out
t25
t30
D15-D0
(write)
READY
Synchronous
Not Rdy
READY
Data In
D15-D0
(read)
t10
RD, WR
tpD
tpE
tpRDY
tpF
CLKOUT
t20
t30
t31
t30
t31
t30
t31
t30
t31
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