參數(shù)資料
型號(hào): SAK-TC1762-128F66HL
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 66 MHz, MICROCONTROLLER, PQFP176
封裝: PLASTIC, LQFP-176
文件頁數(shù): 73/114頁
文件大?。?/td> 852K
代理商: SAK-TC1762-128F66HL
TC1762
Functional Description
Preliminary
Data Sheet
57
V1.0, 2008-04
3.19
Power Management System
The TC1762 power management system allows software to configure the various
processing units so that they automatically adjust to draw the minimum necessary power
for the application. There are three power management modes:
Run Mode
Idle Mode
Sleep Mode
The operation of each system component in each of these states can be configured by
software. The power-management modes provide flexible reduction of power
consumption through a combination of techniques, including stopping the CPU clock,
stopping the clocks of other system components individually, and individually clock-
speed reduction of some peripheral components.
Besides these explicit software-controlled power-saving modes, special attention has
been paid to automatic power-saving in those operating units which are not required at
a certain point of time, or idle in the TC1762. In that case, they are shut off automatically
until their operation is required again.
Table 3-3 describes the features of the power management modes.
In typical operation, Idle Mode and Sleep Mode may be entered and exited frequently
during the run time of an application. For example, system software will typically cause
the CPU to enter Idle Mode each time it has to wait for an interrupt before continuing its
tasks. In Sleep Mode and Idle Mode, wake-up is performed automatically when any
Table 3-3
Power Management Mode Summary
Mode
Description
Run
The system is fully operational. All clocks and peripherals are enabled,
as determined by software.
Idle
The CPU clock is disabled, waiting for a condition to return it to Run
Mode. Idle Mode can be entered by software when the processor has no
active tasks to perform. All peripherals remain powered and clocked.
Processor memory is accessible to peripherals. A reset, Watchdog
Timer event, a falling edge on the NMI pin, or any enabled interrupt event
will return the system to Run Mode.
Sleep
The system clock signal is distributed only to those peripherals
programmed to operate in Sleep Mode. The other peripheral module will
be shut down by the suspend signal. Interrupts from operating
peripherals, the Watchdog Timer, a falling edge on the NMI pin, or a
reset event will return the system to Run Mode. Entering this state
requires an orderly shut-down controlled by the Power Management
State Machine.
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