參數(shù)資料
型號: SC16C754BIA68
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit-s (max.) with 64-byte FIFOs
封裝: SC16C754BIA68<SOT188-2 (PLCC68)|<<http://www.nxp.com/packages/SOT188-2.html<1<Always Pb-free,;SC16C754BIA68<SOT188-2 (PLCC68)|<<http://www.nxp.com/packages/SOT188-2.html&
文件頁數(shù): 11/51頁
文件大小: 253K
代理商: SC16C754BIA68
SC16C754B_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 6 October 2008
11 of 51
NXP Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
6.2.1
Auto-RTS
Auto-RTS data flow control originates in the receiver block (see
Figure 1 “Block diagram of
SC16C754B”
).
Figure 6
shows RTS functional timing. The receiver FIFO trigger levels
used in auto-RTS are stored in the TCR. RTS is active if the RX FIFO level is below the
halt trigger level in TCR[3:0]. When the receiver FIFO halt trigger level is reached, RTS is
de-asserted. The sending device (for example, another UART) may send an additional
byte after the trigger level is reached (assuming the sending UART has another byte to
send) because it may not recognize the de-assertion of RTS until it has begun sending the
additional byte. RTS is automatically reasserted once the receiver FIFO reaches the
resume trigger level programmed via TCR[7:4]. This re-assertion allows the sending
device to resume transmission.
6.2.2
Auto-CTS
The transmitter circuitry checks CTS before sending the next data byte. When CTS is
active, the transmitter sends the next byte. To stop the transmitter from sending the
following byte, CTS must be de-asserted before the middle of the last stop bit that is
currently being sent. The auto-CTS function reduces interrupts to the host system. When
flow control is enabled, CTS level changes do not trigger host interrupts because the
device automatically controls its own transmitter. Without auto-CTS, the transmitter sends
any data present in the transmit FIFO and a receiver overrun error may result.
N = receiver FIFO trigger level.
The two blocks in dashed lines cover the case where an additional byte is sent, as described in
Section 6.2.1
.
Fig 6.
RTS functional timing
Start
byte N
Start
byte N
+
1
Start
Stop
Stop
RX
RTS
IOR
N
N+1
1
2
002aaa226
When CTS is LOW, the transmitter keeps sending serial data out.
When CTS goes HIGH before the middle of the last stop bit of the current byte, the transmitter
finishes sending the current byte, but it does not send the next byte.
When CTS goes from HIGH to LOW, the transmitter begins sending data again.
Fig 7.
CTS functional timing
Start
byte 0 to 7
Stop
TX
CTS
002aaa227
Start
byte 0 to 7
Stop
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