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| 型號： | SC16C754BIA68 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 收發(fā)器 |
| 英文描述： | 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit-s (max.) with 64-byte FIFOs |
| 封裝： | SC16C754BIA68<SOT188-2 (PLCC68)|<<http://www.nxp.com/packages/SOT188-2.html<1<Always Pb-free,;SC16C754BIA68<SOT188-2 (PLCC68)|<<http://www.nxp.com/packages/SOT188-2.html& |
| 文件頁數(shù)： | 32/51頁 |
| 文件大小： | 253K |
| 代理商： | SC16C754BIA68 |
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SC16C754B_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 6 October 2008
32 of 51
NXP Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
7.12 Transmission Control Register (TCR)
This 8-bit register is used to store the RX FIFO threshold levels to stop/start transmission
during hardware/software flow control.
Table 20
shows transmission control register bit
settings.
TCR trigger levels are available from 0 to 60 bytes with a granularity of four.
Remark:
TCR can only be written to when EFR[4] = 1 and MCR[6] = 1. The programmer
must program the TCR such that TCR[3:0] > TCR[7:4]. There is no built-in hardware
check to make sure this condition is met. Also, the TCR must be programmed with this
condition before auto-RTS or software flow control is enabled to avoid spurious operation
of the device.
7.13 Trigger Level Register (TLR)
This 8-bit register is used to store the transmit and received FIFO trigger levels used for
DMA and interrupt generation. Trigger levels from 4 to 60 can be programmed with a
granularity of 4.
Table 21
shows trigger level register bit settings.
Remark:
TLR can only be written to when EFR[4] = 1 and MCR[6] = 1. If TLR[3:0] or
TLR[7:4] are logic 0, the selectable trigger levels via the FIFO Control Register (FCR) are
used for the transmit and receive FIFO trigger levels. Trigger levels from 4 to 60 bytes are
available with a granularity of four. The TLR should be programmed for
N
4
, where N is the
desired trigger level.
7.14 FIFO Ready register (FIFO Rdy)
The FIFO Rdy register provides real-time status of the transmit and receive FIFOs of both
channels.
Table 20.
Bit
7:4
3:0
Transmission control register bits description
Symbol
Description
TCR[7:4]
RX FIFO trigger level to
resume
transmission [(0 to 60) bytes].
TCR[3:0]
RX FIFO trigger level to
halt
transmission [(0 to 60) bytes].
Table 21.
Bit
7:4
3:0
Trigger level register bits description
Symbol
Description
TLR[7:4]
RX FIFO trigger levels (4 to 60), number of characters available.
TLR[3:0]
TX FIFO trigger levels (4 to 60), number of spaces available.
Table 22.
Bit
7:4
FIFO ready register bits description
Symbol
Description
FIFO Rdy[7:4]
0 = there are less than a RX trigger level number of characters in the
RX FIFO
1 = the RX FIFO has more than a RX trigger level number of characters
available for reading
or
a time-out condition has occurred
FIFO Rdy[3:0]
0 = there are less than a TX trigger level number of spaces available in
the TX FIFO
1 = there are at least a TX trigger level number of spaces available in the
TX FIFO
3:0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C754BIA68,512 | 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754BIA68,518 | 功能描述:UART 接口集成電路 4CH. UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754BIA68,529 | 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C754BIA68512 | 制造商:NXP Semiconductors 功能描述:IC QUAD UART FIFO 5MBPS 5.5V LCC-68 |
| SC16C754BIA68-S | 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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