參數(shù)資料
型號(hào): SC16C852VIET,151
廠商: NXP Semiconductors
文件頁(yè)數(shù): 7/55頁(yè)
文件大小: 0K
描述: IC UART DUAL W/FIFO 36TFBGA
標(biāo)準(zhǔn)包裝: 490
特點(diǎn): 可編程
通道數(shù): 2,DUART
FIFO's: 128 字節(jié)
規(guī)程: RS485
電源電壓: 2.5V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 36-TFBGA
供應(yīng)商設(shè)備封裝: 36-TFBGA(3.5x3.5)
包裝: 托盤
其它名稱: 568-5662
935282518151
SC16C852VIET,151-ND
SC16C852VIET-S
SC16C852VIET-S-ND
SC16C852V
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 21 January 2011
15 of 55
NXP Semiconductors
SC16C852V
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Fig 7.
Crystal oscillator connection
If fXTAL1 frequency is greater than 50 MHz, then a DC blocking capacitor is required.
XTAL2 pin should be left unconnected when an external clock is used.
Fig 8.
External clock connection
Table 6.
Baud rate generator programming table using a 1.8432 MHz clock with MCR[7] = 0
and CLKPRE[3:0] = 0
Output
baud rate
(bit/s)
Output
16
× clock divisor
(decimal)
Output
16
× clock divisor
(hexadecimal)
DLM
program value
(hexadecimal)
DLL
program value
(hexadecimal)
50
2304
900
09
00
75
1536
600
06
00
110
1047
417
04
17
150
768
300
03
00
300
384
180
01
80
600
192
C0
00
C0
1200
96
60
00
60
2400
48
30
00
30
3600
32
20
00
20
4800
24
18
00
18
7200
16
10
00
10
9600
12
0C
00
0C
19.2 k
6
06
00
06
38.4 k
3
03
00
03
57.6 k
2
02
00
02
115.2 k
1
01
00
01
002aaa870
C2
47 pF
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
C2
33 pF
XTAL1
XTAL2
1.5 k
Ω
X1
1.8432 MHz
C1
22 pF
002aac630
XTAL1
XTAL2
100 pF
fXTAL1
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