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參數(shù)資料
型號(hào)： SC16IS741IPW,118
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 8/17頁(yè)
文件大?。?/td> 0K
描述： IC UART SGL I2C BUS SPI 16TSSOP
標(biāo)準(zhǔn)包裝： 2,500
系列： *
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
16 of 52
NXP Semiconductors
SC16IS741
Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.
Register descriptions
The programming combinations for register selection are shown in Table 9.
[1]
MCR[7] can only be modified when EFR[4] is set.
[2]
Accessible only when ERF[4] = 1 and MCR[2] = 1, that is, EFR[4] and MCR[2] are read/write enables.
[3]
Accessible only when LCR[7] is logic 1.
[4]
Accessible only when LCR is set to 1011 1111b (0xBF).
Table 9.
Register map - read/write properties
Register name Read mode
Write mode
RHR/THR
Receive Holding Register (RHR)
Transmit Holding Register (THR)
IER
Interrupt Enable Register (IER)
Interrupt Enable Register
IIR/FCR
Interrupt Identification Register (IIR)
FIFO Control Register (FCR)
LCR
Line Control Register (LCR)
Line Control Register
MCR
Modem Control Register (MCR)[1]
Modem Control Register[1]
LSR
Line Status Register (LSR)
n/a
MSR
Modem Status Register (MSR)
n/a
SPR
Scratchpad Register (SPR)
Scratchpad Register
TCR
Transmission Control Register (TCR)[2]
Transmission Control Register[2]
TLR
Trigger Level Register (TLR)[2]
Trigger Level Register[2]
TXLVL
Transmit FIFO Level Register
n/a
RXLVL
Receive FIFO Level Register
n/a
EFCR
Extra Features Register
DLL
divisor latch LSB (DLL)[3]
divisor latch LSB[3]
DLH
divisor latch MSB (DLH)[3]
divisor latch MSB[3]
EFR
Enhanced Feature Register (EFR)[4]
Enhanced Feature Register[4]
XON1
Xon1 word[4]
XON2
Xon2 word[4]
XOFF1
Xoff1 word[4]
Xoff1 word[4]
XOFF2
Xoff2 word[4]
Xoff2 word[4]
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