參數(shù)資料
型號: SD014EVK
廠商: National Semiconductor
文件頁數(shù): 8/21頁
文件大?。?/td> 0K
描述: BOARD EVALUATION CLC014
標準包裝: 1
主要目的: 接口,線纜均衡器
已用 IC / 零件: CLC014
已供物品:
相關產(chǎn)品: CLC014AJE-TR13-ND - IC CABLE EQUALIZER ADAPT 14-SOIC
CLC014AJE-ND - IC CABLE EQUALIZER ADAPTV 14SOIC
OBSOLETE
SNLS010E – JUNE 1998 – REVISED APRIL 2013
The input lines of the CLC014 use a 100
series resistors at the input pins. This decreases the inductive effects
internal to the part to reduce ringing on fast rise and fall times. Refer to the evaluation board layout for further
suggestions on layout for the CLC014 Adaptive Equalizer.
EQUALIZATION CURVE
The CLC014 Adaptive Cable Equalizer has a maximum equalization response as shown in Figure 26. This
response may be obtained by forcing >0.5V differentially at the AEC pins.
Figure 26. Maximum Equalization Response
CABLE EMULATION BOXES
Some cable emulation boxes will not mimic cables correctly. When evaluating the CLC014, it is strongly
recommended that actual cable be used to determine the various performance parameters.
Typical Applications
COAXIAL CABLE RECEIVER (Page 1)
The CLC014 equalizer application shown on page 1 will equalize a variety of coaxial cables up to lengths that
attenuate the signal by 40 dB at 200 MHz. The application shows the proper connection for a single cable driven
with a CLC006 driver. Carrier Detect (CD) is connected to MUTE to latch outputs DO and DO in the absence of
an input signal to the equalizer.
Refer to the CLC014's evaluation board layout for additional suggestions.
Texas Instruments can supply most of the major components required to design a transmission line repeater.
Figure 27 shows a typical repeater design using the CLC006, CLC014, and the CLC016. The design functions
supported by each chip are:
CLC006: Cable connection chip
Boosts drive for transmission to next repeater or final destinations
CLC014: Receive serialized digital data from incoming transmission lines
Equalizes the incoming data
CLC016: Retimes the equalized data (improving jitter)
The CLC016 is a multi-rate data retiming PLL. The circuit (Figure 27) will work at up to 4 different data rates with
no additional components or manual tuning.
16
Copyright 1998–2013, Texas Instruments Incorporated
Product Folder Links: CLC014
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