參數(shù)資料
型號(hào): SI3200-G-GSR
廠商: Silicon Laboratories Inc
文件頁數(shù): 62/112頁
文件大?。?/td> 0K
描述: IC SLIC/CODEC 125V LINE 16SOIC
標(biāo)準(zhǔn)包裝: 2,500
系列: ProSLIC®
功能: 用戶線路接口概念(SLIC),CODEC
接口: GCI,PCM,SPI
電路數(shù): 2
電源電壓: 3.3V,5V
電流 - 電源: 110µA
功率(瓦特): 941mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm Width)裸露焊盤
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 帶卷 (TR)
包括: 電池切換,BORSCHT 功能,DTMF 生成和解碼,F(xiàn)SK 音調(diào)生成,調(diào)制解調(diào)器和傳真音調(diào)檢測(cè)
Si3220/25 Si3200/02
Rev. 1.3
53
Not
Recommended
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Figure 25. Internal Unbalanced Ringing
To enable unbalanced ringing, set the RINGUNB bit of
the RINGCON register. As with internal balanced
ringing, the unbalanced ringing waveform is generated
by using one of the two on-chip tone generators
provided in the Si3220. The tone generator used to
generate ringing tones is a two-pole resonator with
programmable frequency and amplitude. Since ringing
frequencies are low compared to the audio band
signaling
frequencies,
the
ringing
waveform
is
generated at a 1 kHz rate.
The ringing generator is programmed via the RINGAMP,
RINGFREQ, and RINGPHAS registers. The RINGOF
register is used in to set the dc offset position around
which the RING lead will oscillate. Unbalanced ringing
is centered at –80 V instead of VBAT / 2. Use the ring
offset register (RINGOF, indirect Register 56) to position
the dc offset as desired. The dc offset is set at a dc point
equal to VCM – (–80 V + VOFF), where VOFF is the
value that is input into the RINGOF RAM location.
Positive VOFF values will cause the dc offset point to
move closer to ground (lower dc offset), and negative
VOFF values will have the opposite effect. The dc offset
can be set to any value; however, the ringing signal will
be clipped digitally if the dc offset is set to a value that is
less than half the ringing amplitude. In general, the
following equation must hold true to ensure the battery
voltage is sufficient to provide the desired ringing
amplitude:
|VBATR| > |VRING,PK + (–80 V + VOFF) + VOVRING|
It is possible to create reverse polarity unbalanced
ringing waveforms (the TIP lead oscillates while the
RING lead stays constant) by setting the UNBPOLR bit
of the RINGCON register. In this mode, the polarity of
VOFF must also be reversed (in normal ringing polarity
VOFF is subtracted from –80 V, and in reverse polarity,
ringing VOFF is added to –80 V).
3.14. Ringing Coefficients
The ringing coefficients are calculated in decimals for
sinusoidal and trapezoidal waveforms. The RINGPHAS
and
RINGAMP
hex
values
are
decimal
to
hex
conversions in 16-bit 2’s complement representations
for their respective RAM locations.
To obtain sinusoidal RINGFREQ RAM values, the
RINGFREQ decimal number is converted to a 24-bit 2’s
complement value. The lower 12 bits are placed in
RINGFRLO bits 14:3. RINGFRLO bits 15 and 2:0 are
cleared to 0. The upper 12 bits are set in a similar
manner in RINGFRHI, bits 13:3. RINGFRHI bit 14 is the
sign bit, and RINGFRHI bits 2:0 are cleared to 0.
For
example,
the
register
values
for
RINGFREQ = 0x7EFD9D are as follows:
RINGFRHI = 0x3F78
RINGFRLO = 0x6CE8
To obtain trapezoidal RINGFREQ RAM values, the
RINGFREQ decimal number is converted to an 8-bit, 2’s
complement value. This value is loaded into RINGFRHI.
RINGFRLO is not used.
Figure 26. Trapezoidal Ringing Waveform
3.14.1. Ringing DC Offset Voltage
A dc offset voltage can be added to the Si3220’s ac
ringing waveform by programming the RINGOF RAM
location to the appropriate setting. The value of
RINGOF is calculated as follows:
RING
TIP
V
RING
Si3220
DC Offset
GND
V
TIP
V
RING
VBATR
-80V
V
OVRING
V
CM
DC Offset
V
OFF
V
TIP-RING
V
OFF
t
RISE
T = 1/freq
time
RINGOF
V
OFF
160.8
---------------
2
15
=
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