參數(shù)資料
型號(hào): SI3211PPTX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 102/148頁
文件大?。?/td> 0K
描述: BOARD EVAL W/DISCRETE INTERFACE
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3211
已供物品: 板,CD
Si3210/Si3211
Rev. 1.61
57
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 31. Example, IDL2 Long FSYNC, B2, 10-Bit Mode (TXS/RXS = 10)
Figure 32. GCI Example, Timeslot 1 (TXS/RXS = 0)
2.13. Companding
The ProSLIC supports both -255 Law and A-Law companding formats in addition to linear data. These 8-bit
companding schemes follow a segmented curve formatted as sign bit, three chord bits, and four step bits. -255
Law is more commonly used in North America and Japan, while A-Law is primarily used in Europe. Data format is
selected via the PCMF register. Tables 34 and 35 define the -Law and A-Law encoding formats.
01
7
6
5
4
3
2
16
15
14
13
12
11
10
9
818
17
MSB
LSB
MSB
LSB
HI-Z
PCLK
FSYNC
PCLK_CNT
DRX
DTX
01
7
6
5
4
3
2
16
15
14
13
12
11
10
9
818
17
MSB
LSB
HI-Z
PCLK
FSYNC
PCLK_CNT
DRX
DTX
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